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ADP1763ACPZ0.95-R7 bảng dữ liệu(PDF) 15 Page - Analog Devices |
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ADP1763ACPZ0.95-R7 bảng dữ liệu(HTML) 15 Page - Analog Devices |
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15 / 19 page ![]() ADP1763 Data Sheet Rev. 0 | Page 14 of 18 Therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the LDO over temperature and tolerance at the chosen output voltage. To guarantee the performance of the ADP1763, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors be evaluated for each application. UNDERVOLTAGE LOCKOUT The ADP1763 has an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage is less than approximately 1.06 V. The UVLO ensures that the ADP1763 inputs and the output behave in a predictable manner during power-up. CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION The ADP1763 is protected against damage due to excessive power dissipation by current-limit and thermal overload protection circuits. The ADP1763 is designed to reach the current limit when the output load reaches 4 A (typical). When the output load exceeds 4 A, the output voltage is reduced to maintain a constant current limit. Thermal overload protection is included, which limits the junction temperature to a maximum of 150°C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature begins to rise above 150°C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 135°C (typical), the output is turned on again, and the output current is restored to its nominal value. Consider the case where a hard short from VOUT to ground occurs. At first, the ADP1763 reaches the current limit so that only 4 A is conducted into the short circuit. If self heating of the junction becomes great enough to cause its temperature to rise above 150°C, thermal shutdown activates, turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 135°C, the output turns on and conducts 4 A into the short circuit, again causing the junction temperature to rise above 150°C. This thermal oscillation between 135°C and 150°C causes a current oscillation between 4 A and 0 A that continues as long as the short circuit remains at the output. Current-limit and thermal overload protections are intended to protect the device against accidental overload conditions. For reliable operation, limit device power dissipation externally so that junction temperatures do not exceed 125°C. PARALLELING ADP1763 FOR HIGH CURRENT APPLICATIONS In applications where high output current is required while maintaining low noise and high PSRR performance, connect two ADP1763 devices in parallel to handle loads up to 5 A. When paralleling the ADP1763, the two outputs must be of the same voltage setting to maintain stable current sharing between the two LDO regulators. To improve current sharing accuracy, add identical ballast resistors (RBALLAST) at the output of each regulator, as shown in Figure 34. Note that large ballast resistors improve current sharing accuracy but degrade the load regulation perform- ance and increase the losses along the power line; therefore, it is recommended to keep the ballast resistors at a minimum. In addition, tie the VADJ, SS, and REFCAP pins of the LDO regu- lators together to minimize error between the two outputs. VIN EN ENABLE SS VREG VOUT SENSE COUT 10µF PG VADJ GND REFCAP CIN 10µF RBALLAST = 5mΩ RBALLAST = 5mΩ VOUT = 1.2V/5A ADP1763 VIN = 1.5V VIN EN SS VREG VOUT SENSE COUT 10µF PG VADJ GND REFCAP CIN 10µF ADP1763 CREG 1µF CREF 1µF RADJ 4.02kΩ RPULLUP 100kΩ CSS 1nF CREG 1µF CREF 1µF Figure 34. Two ADP1763 Devices Connected in Parallel to Achieve Higher Current Output |
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