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ST92196A bảng dữ liệu(PDF) 150 Page - STMicroelectronics |
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ST92196A bảng dữ liệu(HTML) 150 Page - STMicroelectronics |
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150 / 268 page ![]() 150/268 - ON SCREEN DISPLAY CONTROLLER (OSD) OSD CONTROLLER (Cont’d) 8.5.8.8 Row Buffer Management To Start the Display: 0. Write the (DION, OSDE) bits to (1,0) to access the OSDRAM with the CPU clock, 1. Initialize the color palettes, 2. Initialize the Mouse Pointer Data (if needed), 3. Initialize the “first buffer start address” with the address of the first byte of the above Row Buffer (address 0002h & 0003h of the segment 22h), 4. Fill up one of the row buffers with the data to display the desired row (only in case the TE bit in the OSDER register has been set), 5. Initialize the Event Line value to the desired one (address 0000h & 0001h of the segment 22h), 6. Set the MOPE bit (if needed), 7. Start the Display controller by programming the mode control bits (DION, OSDE) and the trans- fer enable bit (TE) to the desired working mode. It is mandatory to start the display following the algorithm below: 1 unsigned char tmp; spp(OSD_PG); /* select the OSD register page */ OSDFBR &= ~0x06; /* reset DINT & MOIT bits */ 5 while (OSDFBR & OSDm_Vsy); /* wait a Low to High transition on VSYNC */ while (!(OSDFBR & OSDm_Vsy)); tmp= OSDMR; /* save LSM bits */ 10 OSDMR &= ~0x07; /* reset the LSM bits so that the Hsy bit will be an image of the HSYNC pulse */ OSDER = 0x40; /* OSDRAM interface enabled with PIXEL clock */ di(); /* disable all interrupts */ 15 while (OSDFBR & OSDm_Hsy); /* wait a HSYNC pulse : Low -> High -> Low transition */ while (!(OSDFBR & OSDm_Hsy)); while (OSDFBR & OSDm_Hsy); 20 OSDMR = tmp; /* recover old LSM bit value */ spp(OSD_PG); /* select the OSD register page */ OSDER |= 0xE2; /* start the display by setting the appropriate bits, set at least OSDE, DION, and TE bits. Then set the other bits as required 25 for your application. Here the MOPE (MOuse Pointer Enable) bit is also set */ ei(); /* enable interrupts again*/ |
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