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E98103A38B bảng dữ liệu(PDF) 45 Page - ELMOS Semiconductor AG

tên linh kiện E98103A38B
Giải thích chi tiết về linh kiện  Autonomous MAC and individual physical address
PDF  51 Pages
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nhà sản xuất  ELMOS [ELMOS Semiconductor AG]
Trang chủ  http://www.elmos.de
Logo ELMOS - ELMOS Semiconductor AG

E98103A38B bảng dữ liệu(HTML) 45 Page - ELMOS Semiconductor AG

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Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0046E.03
PRODUCTION DATA - JAN 15, 2015
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
KNX/ EIB TRANSCEIVER
E981.03
Register Name
Address
Description
UART_TX
0x2A4
UART transmitter data register
Register Name
Address
Description
SPI_CTRL
0x205
SPI control register
SPI_STAT
0x310
SPI status register
SPI_PINS
0x206
SPI pin access
Table 55. UART transmitter registers
Table 57. SPI registers
UART_RX
MSB
LSB
content
D7
D6
D5
D4
D3
D2
D1
D0
hard reset value
0
0
0
0
0
0
0
0
soft reset value
-(not reset)
access
R 1)
R 1)
R 1)
R 1)
R 1)
R 1)
R 1)
R 1)
UART_TX
MSB
LSB
content
D7
D6
D5
D4
D3
D2
D1
D0
hard reset value
0
0
0
0
0
0
0
0
soft reset value
-(not reset)
access
R 1)
R 1)
R 1)
R 1)
R 1)
R 1)
R 1)
R 1)
Table 54. Previous received byte
Table 56. UART transmitter data register
back to Table 8 Register Table
back to Table 8 Register Table
back to Table 8 Register Table
back to Table 8 Register Table
UART Byte Transmitter
TXD idle-level in any other mode but KNX Analog Mode is "1".
The UART transmitter has a baud rate deviation of less than 1% during byte frame transmission. Subsequent
bytes may be transmitted without a break.
SPI_CTRL
MSB
LSB
content
-
-
-
-
-
-
ON1
ON0
hard reset value
0
0
0
0
0
0
1
1
soft reset value
-
-
-
-
-
-
1
1
access
R
R
R
R
R
R
R/W 1)
R/W 1)
bit description
ON1 :
ON0 :
"-1" or "1-": the SPI is switched on
"00": the SPI is switched off
SPI_STAT
MSB
LSB
content
-
-
-
-
-
-
-
XERR
hard reset value
0
0
0
0
0
0
0
0
soft reset value
- (not reset)
access
R
R
R
R
R
R
R
R 1)
bit description
XERR : XOR error detected
Table 58. SPI control register
Table 59. SPI status register
1) Access via UART service and SPI possible. In case of hard reset the register is reset to the hard reset value.
1) Access via UART service and SPI possible. In case of hard reset the register is reset to the hard reset value.
1) Access via UART service and SPI possible. In case of hard or soft reset the register is reset to the hard reset value or soft reset
value respectively.
1) Access via UART service and SPI possible. In case of hard reset the register is reset to the hard reset value.



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