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TCS3430 bảng dữ liệu(PDF) 13 Page - ams AG

tên linh kiện TCS3430
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nhà sản xuất  AMSCO [ams AG]
Trang chủ  http://www.ams.com
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TCS3430 bảng dữ liệu(HTML) 13 Page - ams AG

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Page 13
[v1-05] 2016-Aug-19
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TCS3430 − Register Description
ATIME Register (0x81)
Figure 19:
ATIME Register
The ATIME register controls the integration time of the ALS
ADCs.
The timer is implemented with a down counter with 0x00 as the
terminal count. The timer is clocked at a 2.78ms nominal rate.
Loading 0x00 will generate a 2.78ms integration time, loading
0x01 will generate a 5.56ms integration time, and so forth.
0x81: ATIME
Field
Name
Reset
Type
Description
7:0
ATIME
0x00
RW
Integration Time. Eight bit value that specifies the integration time
in 2.78ms intervals. 0x00 indicates 2.78ms, 0x01 indicates 5.56ms.
The maximum ALS value depends on the integration time. For
every 2.78ms, the maximum value increases by 1024. This means
that to be able to reach ALS full scale, the integration time has to be
at least 64*2.78ms.
Value
Integration
Cycles
Integration
Time
Maximum ALS
Value
0x00
1
2.78ms
1023
0x01
2
5.56ms
2047
...
...
...
...
0x11
18
50ms
18431
0x40
65
181ms
65535
...
...
...
...
0xff
256
711ms
65535



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