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TS3USB3200 bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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TS3USB3200 bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 23 page ![]() 4 TS3USB3200 SCDS333B – JUNE 2012 – REVISED JULY 2016 www.ti.com Product Folder Links: TS3USB3200 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. (3) All voltages are with respect to ground, unless otherwise specified. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT VCC ,VBUS Supply voltage(3) –0.3 5.5 V VI/O Input/Output DC voltage(3) –0.5 5.5 V IK Input/Output port diode current VI/O < 0 –50 mA VI Digital input voltage range (SEL1, SEL2, PSEL) –0.3 5.5 V IIK Digital logic input clamp current(3) VI < 0 –50 mA ICC Continuous current through VCC 100 mA IGND Continuous current through GND –100 mA Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3500 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 6.3 Recommended Operating Conditions MIN MAX UNIT VCC Supply voltage 2.7 4.3 V VBUS VBUS Supply voltage 4.3 5.5 V VI/O (USB) VI/O (ID) Analog voltage for USB and ID signal path 0 3.6 V VI/O (MHL) Analog voltage for MHL signal path 1.6 3.4 V VI Digital input voltage (SEL1, SEL2, PSEL) 0 VCC V TRAMP (VCC) Power supply ramp time requirement (VCC) 100 1000 μs/V TRAMP (VBUS) Power supply ramp time requirement (VBUS) 100 1000 μs/V TA Operating free-air temperature –40 85 ºC (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) The package thermal impedance is calculated in accordance with JESD 51-7. 6.4 Thermal Information THERMAL METRIC(1) TS3USB3200 UNIT RSV (UQFN) 16 PINS RθJA Junction-to-ambient thermal resistance(2) 109.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 36 °C/W RθJB Junction-to-board thermal resistance 46.4 °C/W ψJT Junction-to-top characterization parameter 1 °C/W ψJB Junction-to-board characterization parameter 49.7 °C/W |
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