ACE93C46A/56A/66A

Three-wire Serial EEPROM

VER 1.3

5

ACE93C56A

ACE93C66A

1

1

01

01

location A

W RITE

ACE93C46A

ACE93C56A

ACE93C66A

1

1

1

00

00

00

W rites memory

location A

ERAL

ACE93C46A

ACE93C56A

ACE93C66A

1

1

1

00

00

00

10XXXXX

10XXXXXXX

10XXXXXXX

10XXXX

10XXXXXX

10XXXXXX

Erases all

memory

locations.

W RAL

ACE93C46A

ACE93C56A

ACE93C66A

1

1

1

00

00

00

01XXXXX

01XXXXXXX

01XXXXXXX

01XXXX

01XXXXXX

01XXXXXX

W rites all

memory

locations.

(A)

START BIT (SB)

Each instruction is preceded by a rising edge on Chip Select (CS) with Serial Clock (SCL) being

held Low.

(B)

OPERATION

CODE (OP-CODE)

Two op-code bits, read on Serial Data Input (DI) during the rising edge of Serial Clock (SCL).

(C)

ADDRESS

The address bits of the byte or word that is to be accessed. For the ACE93C46A, the address is

made up of 6 bits for the x16 organization or 7 bits for x8 organization. For the ACE93C56A, the

address is made up of 7 bits for the x16 organization or 8 bits for x8 organization. For the ACE

93C66A, the address is made up of 8 bits for the x16 organization or 9 bits for x8 organization.

(D)

DATA

The data bits of the byte or word that is to be accessed. For the ACE93C46A/56A/66A, the data

is made up of 16 bits (word) for the x16 organization or 8 bits (byte) for x8 organization.

Instruction Sets Description

(A)

READ

The Read (READ) instruction contains the Address code for the memory location to be read.

After the instruction and address are decoded, data from the selected memory location is

available at the serial output pin DO. Output data changes are synchronized with the rising

edges of serial clock SK. It should be noted that when a dummy bit (logic

“0”) precedes the 8- or

16-bit data output string.

(B)

ERASE/WRITE ENABLE

To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state

when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first

before any programming instructions can be carried out. Please note that once in the

Erase/Write Enable state, programming remains enabled until an Erase/Write Disable (EWDS)

instruction is executed or VCC power is removed from the part.