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DF1706E/2K bảng dữ liệu(PDF) 7 Page - Texas Instruments

tên linh kiện DF1706E/2K
Giải thích chi tiết về linh kiện  Stereo, 24-Bit, 192kHz 8x Oversampling Digital Interpolation Filter
PDF  16 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI - Texas Instruments

DF1706E/2K bảng dữ liệu(HTML) 7 Page - Texas Instruments

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DF1706
7
SBAS182
FIGURE 4. Audio Data Input Formats.
1
2
15
1/f
S
Lch
Rch
MSB
LSB
16
LRCIN
BCKIN
AUDIO DATA WORD = 16-BIT
D
IN
1
2
15
MSB
LSB
16
2
1
2
1
1
2
23
MSB
LSB
24
AUDIO DATA WORD = 24-BIT
D
IN
1
2
23
MSB
LSB
24
(c) I2S Data Format (Philips Format); L-Channel = LOW, R-Channel = HIGH
14
15
16
1
2
15
1/f
S
Lch
Rch
MSB
LSB
16
LRCIN
BCKIN
AUDIO DATA WORD = 16-BIT
(a) Standard Data Format; L-Channel = HIGH, R-Channel = LOW
D
IN
1
2
15
16
18
19
22
23
20
1
2
19
MSB
LSB
20
AUDIO DATA WORD = 20-BIT
D
IN
1
2
19
20
24
1
2
23
MSB
LSB
24
AUDIO DATA WORD = 24-BIT
D
IN
1
2
23
MSB
LSB
24
AUDIO INPUT INTERFACE
The audio input interface is comprised of BCKIN (pin 2),
LRCIN (pin 28), and DIN (pin 1). BCKIN is the input bit
clock, which is used to clock data applied at DIN into the
DF1706’s input serial interface. Input data at DIN is clocked
into the DF1706 on the rising edge of BCKIN. The left/right
clock, LRCIN, is used as a word latch for the audio input
data. BCKIN can run at 32fS, 48fS, or 64fS, where fS is the
audio sample frequency. LRCIN is run at the fS rate. Figures
4 (a) through (c) show the input data formats, which are sel-
ected by hardware or software controls.
See Figure 5 for the audio input interface timing requirements.
FIGURE 3. External Forces Reset Timing.
1024 system clocks
Reset
Reset Removal
System Clock
Internal Reset
External Reset
1
2
3
22
23
1/f
S
Lch
Rch
MSB
LSB
24
LRCIN
BCKIN
AUDIO DATA WORD = 24-BIT
D
IN
1
2
3
1
2
3
22
23
MSB
LSB
24
(b) Left-Justified Format; L-Channel = HIGH, R-Channel = LOW



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