AD5160

LAYOUT AND POWER SUPPLY BYPASSING

It is a good practice to employ compact, minimum lead length

layout design. The leads to the inputs should be as direct as

possible with a minimum conductor length. Ground paths

should have low resistance and low inductance.

Similarly, it is also a good practice to bypass the power supplies

with quality capacitors for optimum stability. Supply leads to the

device should be bypassed with disc or chip ceramic capacitors

of 0.01 µF to 0.1 µF. Low ESR 1 µF to 10 µF tantalum or

electrolytic capacitors should also be applied at the supplies to

minimize any transient disturbance and low frequency ripple

(see Figure 42). Note that the digital ground should also be

joined remotely to the analog ground at one point to minimize

the ground bounce.

AD5160

C1

C3

GND

10

µF

0.1

µF

+

Figure 42. Power Supply Bypassing

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