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DA9211 bảng dữ liệu(PDF) 68 Page - Dialog Semiconductor |
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DA9211 bảng dữ liệu(HTML) 68 Page - Dialog Semiconductor |
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68 / 74 page ![]() DA9211 and DA9212 Datasheet Company confidential Data sheet Version <3.0> <07-Jan-2015> CFR0011-120-00 Rev 3 68 of 74 © 2015 Dialog Semiconductor GmbH Register Bit Type Label Def Description 0x144 CONFIG_B 7 R/W UVLO_IO_DIS 0 Disable the UVLO for the VDDIO rail and its comparator (suggested for rail voltages different to 1.8 V and to save quiescent current) 6 R/W PGB_DVC_MAS K 0 Power-good configuration for Buck B 0: Power-good signal not masked during DVC transitions 1: Power-good signal masked during DVC transitions (keep previous status) 5 R/W PGA_DVC_MAS K 0 Power-good configuration for Buck A 0: Power-good signal not masked during DVC transitions 1: Power-good signal masked during DVC transitions (keep previous status) 4:3 R/W OCB_MASK 00 Over Current configuration for Buck B 00: Event generation due to over current hit is always active during DVC transitions of the Buck converter 01: Event generation due to over current hit is masked during DVC transitions of the buck converter + 2 µs extra masking at the end 10: Event generation due to over current hit is masked during DVC transitions of the buck converter + 10 µs extra masking at the end 11: Event generation due to over current hit is masked during DVC transitions of the buck converter + 50 µs extra masking at the end 2:1 R/W OCA_MASK 00 Over Current configuration for Buck A 00: Event generation due to over current hit is always active during DVC transitions of the buck converter 01: Event generation due to over current hit is masked during DVC transitions of the buck converter + 2 µs extra masking at the end 10: Event generation due to over current hit is masked during DVC transitions of the buck converter + 10 µs extra masking at the end 11: Event generation due to over current hit is masked during DVC transitions of the buck converter + 50 µs extra masking at the end 0 R/W (reserved) 0 |
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