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DA9155M bảng dữ liệu(PDF) 19 Page - Dialog Semiconductor |
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DA9155M bảng dữ liệu(HTML) 19 Page - Dialog Semiconductor |
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19 / 36 page ![]() DA9155M 2.5 A Companion Charger for rapid charging SLAVEadr W REGadr A DATA A P S = START condition A = Acknowledge (low) P = STOP condition W = Write (low) Master to Slave Slave to Master 7-bits 1-bit 8-bits 8-bits A S Figure 13: Byte write operation When the host reads data from a register it first has to write-access DA9155M the target register address and then read-access DA9155M with a repeated START or alternatively a second START condition. After receiving the data, the host sends NACK and terminates the transmission with a STOP condition. This is illustrated in Figure 14. S SLAVEadr W A REGadr A SLAVEadr A S = START condition A = Acknowledge (low) Sr = Repeated START condition A * = No Acknowledge P = STOP condition W = Write (low) R = Read (high) Master to Slave 7-bits 1-bit 8-bits 7-bits DATA A * Sr R 1-bit 8-bits SLAVEadr A 7-bits DATA P S R 1-bit 8-bits P A * Slave to Master S SLAVEadr W A REGadr P 7-bits 1-bit 8-bits A Figure 14: Examples of byte read operations Consecutive (page) read-out mode is initiated from the master by sending an ACK instead of NACK after receiving a byte, see Figure 15. The 2-wire control block then increments the address pointer to the next register address and sends the data to the master. This enables an unlimited read of data bytes until the master sends a NACK directly after receiving the data, followed by a subsequent STOP condition. If a non-existent 2-wire address is read out then the DA9155M will return code zero. S SLAVEadr W A REGadr A SLAVEadr A S = START condition A = Acknowledge (low) Sr = Repeat START condition A * = No Acknowledge P = STOP condition W = Write (low) R = Read (high) Master to Slave Slave to Master 7-bits 1 bit 8-bits 7-bits DATA A Sr R 1-bit 8-bits S SLAVEadr W A REGadr A SLAVEadr A 7-bits 1-bit 8-bits 7-bits DATA P S R 1-bit 8-bits P A A * P DATA DATA A A * DATA 8-bits 8-bits 8-bits Figure 15: 2-wire page read The slave address after the Repeated START condition must be the same as the previous slave address. Consecutive (page) write mode is supported if the master sends several data bytes following a slave register address. The 2-wire control block then increments the address pointer to the next 2-wire address, stores the received data, and sends an ACK until the master sends a STOP condition. The page write mode is illustrated in Figure 16. Datasheet v3.05 22-July-2016 CFR0011-120-00 Rev 5 19 of 36 © 2016 Dialog Semiconductor |
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