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STV9211 bảng dữ liệu(PDF) 8 Page - STMicroelectronics |
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STV9211 bảng dữ liệu(HTML) 8 Page - STMicroelectronics |
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8 / 37 page ![]() Functional description STV9211 8/37 2.2 Fast blanking input The fast blanking pin (FBLK) is TTL compatible. When it is at high level, the input signal is blanked and replaced by OSD insets defined by binary levels on three OSD inputs and a dedicated OSD contrast adjustment stage. 2.3 Blanking input The blanking input BLK is TTL compatible. The active level is either high (positive pulse polarity) or low (negative pulse polarity). When the level is active, the RGB outputs are at infra-black level, regardless of the input level. The pulse on the BLK input defines the timing of the internal OCL signal and it can also define the timing of the internal BPCP pulse. See Figure 4, Figure 11 and Chapter 9: I2C register description . Figure 4: BPCP and OCL generation Edge 1 Selection HS Automatic Polarity Pulse Generation Polarity Selection Pulse Generation 20 BLK External External BPCP Internal OCL Internal BLK Polarity Selection: R9-bit0 Source Selection HS Edge Selection Width Selection BPCP Source Selection OCL source Selection: R8-bit7 R8-bit1 R8-bit4 R8-bit2 & bit3 R8-bit0 |
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