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ST72561 bảng dữ liệu(PDF) 228 Page - STMicroelectronics |
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ST72561 bảng dữ liệu(HTML) 228 Page - STMicroelectronics |
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228 / 262 page ![]() ST72561 228/262 12.4.5 On-Chip Peripherals TA= 25°C, fCPU=8 Mhz. Notes: 1. Data based on a differential IDD measurement between reset configuration (timer counter running at fCPU/4) and timer counter stopped (only TIMD bit set). Data valid for one timer. 2. Data based on a differential IDD measurement between reset configuration (timer stopped) and timer counter enabled (only TCE bit set). 3. Data based on a differential IDD measurement between reset configuration (SPI disabled) and a permanent SPI master communication at maximum speed (data sent equal to 55h).This measurement includes the pad toggling consumption. 4. Data based on a differential IDD measurement between SCI low power state (SCID=1) and a permanent SCI data trans- mit sequence. Data valid for one SCI. 5. Data based on a differential IDD measurement between reset configuration (CAN disabled) and a permanent CAN data transmit sequence with RX and TX connected together. This measurement include the pad toggling consumption. 6. Data based on a differential IDD measurement between reset configuration and continuous A/D conversions. Symbol Parameter Conditions Typ Unit IDD(TIM) 16-bit Timer supply current 1) VDD=5.0V 50 µA IDD(TIM8) 8-bit Timer supply current 1) VDD=5.0V 50 IDD(ART) ART PWM supply current2) VDD=5.0V 75 IDD(SPI) SPI supply current 3) VDD=5.0V 400 IDD(SCI) SCI supply current 4) VDD=5.0V 400 IDD(CAN CAN supply current 5) VDD=5.0V 800 IDD(ADC) ADC supply current when converting 6) VDD=5.0V 400 |
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