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ST72561 bảng dữ liệu(PDF) 127 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI , ACTIVE CAN
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ST72561 bảng dữ liệu(HTML) 127 Page - STMicroelectronics

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LIN
SCI
 SERIAL COMMUNICATION INTERFACE (SCI Mode) (Cont’d)
10.7.5 SCI Mode - Functional Description
Conventional Baud Rate Generator Mode
The block diagram of the Serial Control Interface
in conventional baud rate generator mode is
shown in Figure 77.
It uses 4 registers:
– Two control registers (SCICR1 and SCICR2)
– A status register (SCISR)
– A baud rate register (SCIBRR)
Extended Prescaler Mode
Two additional prescalers are available in extend-
ed prescaler mode. They are shown in Figure 79.
– An extended prescaler receiver register (SCIER-
PR)
– An extended prescaler transmitter register (SCI-
ETPR)
10.7.5.1 Serial Data Format
Word length may be selected as being either 8 or 9
bits by programming the M bit in the SCICR1 reg-
ister (see Figure 78).
The TDO pin is in low state during the start bit.
The TDO pin is in high state during the stop bit.
An Idle character is interpreted as a continuous
logic high level for 10 (or 11) full bit times.
A Break character is a character with a sufficient
number of low level bits to break the normal data
format followed by an extra “1” bit to acknowledge
the start bit.
Figure 78. Word length programming
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Bit8
Start
Bit
Stop
Bit
Next
Start
Bit
Idle Line
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Start
Bit
Stop
Bit
Next
Start
Bit
Start
Bit
Idle Line
Start
Bit
9-bit Word length (M bit is set)
8-bit Word length (M bit is reset)
Possible
Parity
Bit
Possible
Parity
Bit
Break Character
Start
Bit
Extra
’1’
Data Character
Break Character
Start
Bit
Extra
’1’
Data Character
Next Data Character
Next Data Character



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