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M38B53M4-059FP bảng dữ liệu(HTML) 252 Page - Mitsubishi Electric Semiconductor |
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252 / 355 page  3-4 38B5 Group User’s Manual APPENDIX 3.1 Electrical characteristics Table 3.1.3 Recommended operating conditions (2) (VCC = 4.0 to 5.5 V, Ta = –20 to 85 °C, unless otherwise noted) Clock input frequency for timers 2, 4, and X (duty cycle 50 %) Main clock input oscillation frequency (Note 1) Sub-clock input oscillation frequency (Notes 1, 2) Symbol Parameter Limits Unit f(CNTR0) f(CNTR1) f(XIN) f(XCIN) kHz MHz kHz 250 4.2 50 Max. Typ. Min. 32.768 Notes 1: When the oscillation frequency has a duty cycle of 50%. 2: When using the microcomputer in low-speed mode, set the sub-clock input oscillation frequency on condition that f(XCIN) < f(XIN)/3. 3.1.3 Electrical characteristics Table 3.1.4 Electrical characteristics (1) (VCC = 4.0 to 5.5 V, Ta = –20 to 85 °C, unless otherwise noted) Min. Typ. Max. Symbol Parameter Limits Unit “H” output voltage P00–P07, P10–P17, P20–P27, P30–P37, P80–P83 “H” output voltage P50–P57, P60–P65, P70–P77, P84–P87, P90, P91 “L” output voltage P50–P57, P61–P65, P84–P87, P90, P91 “L” output voltage P40–P46, P60 Hysteresis P40–P42, P45–P47, P5, P60, P61, P64 (Note 1) Hysteresis RESET, XIN Hysteresis XCIN “H” input current P47, P50–P57, P61–P65, P70–P77, P84–P87 “H” input current P40–P46, P60 “H” input current P00–P07, P20–P27, P80–P83 “H” input current RESET, XCIN “H” input current XIN “L” input current P40–P47, P60 “L” input current P50–P57, P61–P65, P70–P77, P84–P87, P90, P91 “L” input current P00–P07, P20–P27, P80–P83 “L” input current RESET, XCIN “L” input current XIN Output load current P00–P07, P10–P17, P30–P37 Output leak current P00–P07, P10–P17, P20–P27, P30–P37, P80–P83 “H” read current P00–P07, P20–P27, P80–P83 VOH VOH VOL VOL VT+–VT– VT+–VT– VT+–VT– IIH IIH IIH IIH IIH IIL IIL IIL IIL IIL ILOAD ILEAK IREADH VRAM IOH = –18 mA IOH = –10 mA IOL = 10 mA IOL = 15 mA VI = VCC VI = 12 V VI = VCC VI = VCC VI = VCC VI = VSS VI = VSS Pull-up “off” VCC = 5 V, VI = VSS Pull-up “on” VCC = 3 V, VI = VSS Pull-up “on” VI = VSS VI = VSS VI = VSS VEE = VCC–43 V, VOL =VCC Output transistors “off” VEE = VCC–43 V, VOL =VCC–43 V Output transistors “off” VI = 5 V When clock is stopped Test conditions VCC–2.0 VCC–2.0 2.0 2.0 5.0 10.0 5.0 5.0 –5.0 –5.0 –140 –45 –5.0 –5.0 900 –10 5.5 0.6 0.4 0.5 0.5 4.0 –70 –25 –4.0 600 1 –30 –6.0 300 2 Notes 1: P42, P45, P46, and P60 of the mask option type P do not have hysteresis characteristics. 2: Except when reading ports P0, P2, or P8. V V V V V V V µA µA µA µA µA µA µA µA µA µA µA µA µA µA µA V (Note 2) (Note 2) |
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