M38B53M4-059FP datasheet(176/355 Pages) MITSUBISHI

176 / 355 page

38B5 Group User’s Manual

2-88

APPLICATION

2.4 FLD controller

Fig. 2.4.6 Structure of Toff1 time set register

Fig. 2.4.7 Structure of Toff2 time set register

Toff1 time set register

b7 b6 b5 b4 b3 b2 b1 b0

Toff1 time set register

(TOFF1: address 0EF616)

Functions

At reset R W

•Set the Toff1 time.

•When a value n1 is written to this register,

Toff1 time is expressed as Toff1 = n1 ! count

source.

(Example)

When the following condition is satisfied, Toff1

becomes 120

µs (= 30 ! 4 µs);

•f(XIN) = 4 MHz

•bit 6 of FLDC mode register = 0

(f(XIN)/16 is selected as Tdisp counter count

source.)

•Toff1 time set register = 30 (1E16).

Note: Set value of 0316 or more.

Toff2 time set register

b7 b6 b5 b4 b3 b2 b1 b0

Toff2 time set register

(TOFF2: address 0EF716)

Functions

At reset R W

•Set the Toff2 time.

•When a value n2 is written to this register,

Toff2 time is expressed as Toff2 = n2 ! count

source.

However, setting of Toff2 time is valid only for

the FLD port which is satisfied the following;

•gradation display mode

•value of FLD automatic display RAM (in

gradation display mode) = “1” (dark display).

(Example)

When the following condition is satisfied, Toff2

becomes 720

µs (= 180 ! 4 µs);

•f(XIN) = 4 MHz

•bit 6 of FLDC mode register = 0

(f(XIN)/16 is selected as Tdisp counter count

source.)

•Toff2 time set register = 180 (B416).

Note: When the Toff2 control bit (b7) of the port P8FLD output control

more to the Toff2 control register.

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