Connection Diagram

20086916

16-Lead TSSOP, LLP

Ordering Information

Order Number

Package Type

NSC Package Drawing

Supplied As

LM5025MTC

TSSOP-16

MTC-16

92 Units per anti-static tube

LM5025MTCX

TSSOP-16

MTC-16

2500 Units on Tape and Reel

LM5025SD

LLP-16

SDA-16A

1000 Units on Tape and Reel

LM5025SDX

LLP-16

SDA-16A

4500 Units on Tape and Reel

Pin Description

PIN

NAME

DESCRIPTION

APPLICATION INFORMATION

1V

IN

Source Input Voltage

Input to start-up regulator. Input range 13V to 90V,

with transient capability to 100V.

2

RAMP

Modulator ramp signal

An external RC circuit from Vin sets the ramp slope.

This pin is discharged at the conclusion of every

cycle by an internal FET, initiated by either the

internal clock or the V*Sec Clamp comparator.

3

CS1

Current sense input for cycle-by-cycle limiting If CS1 exceeds 0.25V the outputs will go into

Cycle-by-Cycle current limit. CS1 is held low for

50ns after OUT_A switches high providing leading

edge blanking.

4

CS2

Current sense input for soft restart

If CS2 exceeds 0.25V the outputs will be disabled

and a softstart commenced. The soft-start capacitor

will be fully discharged and then released with a

pull-up current of 1µA. After the first output pulse

(when SS =1V), the SS charge current will revert

back to 20µA. CS2 is held low for 50ns after OUT_A

switches high, providing leading edge blanking.

5

TIME

Output overlap/Deadtime control

An external resistor (R

time or dead time for the active clamp output. An

R

produces in-phase OUT_A and OUT_B pulses with

overlap. An R

and REF produces out-of-phase OUT_A and OUT_B

pulses with deadtime.

6

REF

Precision 5 volt reference output

Maximum output current: 10mA Locally decouple

with a 0.1µF capacitor. Reference stays low until the

line UVLO and the V

satisfied.

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