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LXT381II bảng dữ liệu(PDF) 15 Page - Intel Corporation

tên linh kiện LXT381II
Giải thích chi tiết về linh kiện  Octal E1 Line Interface Unit
PDF  36 Pages
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nhà sản xuất  INTEL [Intel Corporation]
Trang chủ  http://www.intel.com
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LXT381II bảng dữ liệu(HTML) 15 Page - Intel Corporation

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Octal E1 Line Interface — LXT381
Datasheet
15
2.5.1
Analog Loopback
When selected, the transmitter outputs (TTIP & TRING) are connected internally to the receiver
inputs (RTIP & RRING) as shown in Figure 3. Data and clock are output at RCLK, RPOS &
RNEG pins for the corresponding transceiver. Note: Signals on the RTIP & RRING pins are
ignored during analog loopback.
2.5.2
Remote Loopback
During remote loopback, the RCLK, RPOS & RNEG outputs routed to the transmit circuits and
output on the TTIP & TRING pins. Signals on the TCLK, TPOS & TNEG pins are ignored during
remote loopback. See Figure 4. Note: because in a remote loopback, the RPOS/RNEG outputs
determine the transmitter pulse width, the G.703 pulse template may not be met in this test mode.
2.6
Hitless Protection Switching (HPS)
The LXT386 transceivers include an output driver tristatability feature for T1/E1 redundancy
applications. This feature greatly reduces the cost of implementing redundancy protection by
eliminating external relays. Please refer to Application Note 119 for guidelines for implementing
redundancy systems for both T1 and E1 operation using the LXT380/1/4/6.
Figure 3. Analog Loopback
Buffer/
Pulse
Shaper
Data
Recovery
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
Figure 4. Remote Looback
Buffer/
Pulse
Shaper
Data
Recovery
TTIP
TRING
RTIP
RRING
RCLK
RPOS
RNEG
TCLK
TPOS
TNEG



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