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CDC5801 bảng dữ liệu(PDF) 8 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT
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CDC5801 bảng dữ liệu(HTML) 8 Page - Texas Instruments

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CDC5801
LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH
PROGRAMMABLE DELAY AND PHASE ALIGNMENT
SCAS682A – OCTOBER 2002
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
jitter specification over recommended operating free-air temperature range and VCC (unless
otherwise noted)
PARAMETER
CLKOUT
TEST CONDITIONS
MIN
TYP†
MAX
UNIT
155 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
6.0
40
50
27
27
ps
200 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
5.5
36
36
36
23
23
ps
t(jitter)
(Multiplication only mode. Phase alignment
and programmable delay features are not
selected (PA bypass). See Figure 2.)
312 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
3.0
20
18
18
17
17
ps
400 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
2.3
17
12
12
15
15
ps
500 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
2.1
16
8
8
14
14
ps
155 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
9.0
70
50
50
50
ps
t(jitter)
(Multiplication with phase alignment and
200 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
7.0
55
36
36
40
40
ps
(j
)
(Multiplication with phase alignment and
programmable delay features selected. See
Figure 2.)
312 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
4.0
35
18
18
30
30
ps
400 MHz
Period RMS (1
Σ jitter, full frequency band)
Period p-p
Phase jitter (accumulated, 12 kHz to 20 MHz)
Phase jitter (accumulated, 50 kHz to 80 MHz)
Cycle-to-cycle (+)
Cycle-to-cycle (–)
3.1
27
13
13
25
25
ps
† All typical values are at VDD = 3.3 V, TA = 25°C.



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