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DS90C032 bảng dữ liệu(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
tên linh kiện DS90C032
Giải thích chi tiết về linh kiện  LVDS Quad CMOS Differential Line Receiver
PDF  12 Pages
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nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
Logo NSC - National Semiconductor (TI)

DS90C032 bảng dữ liệu(HTML) 4 Page - National Semiconductor (TI)

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Switching Characteristics
V
CC = +5.0V, TA = +25˚C DS90C032T (Notes 3, 4, 5, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHLD
Differential Propagation Delay High to Low
C
L = 5 pF
1.5
3.40
5.0
ns
t
PLHD
Differential Propagation Delay Low to High
V
ID = 200 mV
1.5
3.48
5.0
ns
t
SKD
Differential Skew |t
PHLD −tPLHD|(Figure 1 and Figure 2)
0
80
600
ps
t
SK1
Channel-to-Channel Skew (Note 5)
0
0.6
1.0
ns
t
TLH
Rise Time
0.5
2.0
ns
t
THL
Fall Time
0.5
2.0
ns
t
PHZ
Disable Time High to Z
R
L =2k
Ω
10
15
ns
t
PLZ
Disable Time Low to Z
C
L =10pF
10
15
ns
t
PZH
Enable Time Z to High
(Figure 3 and Figure 4)
4
10
ns
t
PZL
Enable Time Z to Low
410
ns
Switching Characteristics
V
CC = +5.0V ± 10%, TA = −40˚C to +85˚C DS90C032T (Notes 3, 4, 5, 6, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHLD
Differential Propagation Delay High to Low
C
L = 5 pF
1.0
3.40
6.0
ns
t
PLHD
Differential Propagation Delay Low to High
V
ID = 200 mV
1.0
3.48
6.0
ns
t
SKD
Differential Skew |t
PHLD −tPLHD|(Figure 1 and Figure 2)
0
0.08
1.2
ns
t
SK1
Channel-to-Channel Skew (Note 5)
0
0.6
1.5
ns
t
SK2
Chip to Chip Skew (Note 6)
5.0
ns
t
TLH
Rise Time
0.5
2.5
ns
t
THL
Fall Time
0.5
2.5
ns
t
PHZ
Disable Time High to Z
R
L =2k
Ω
10
20
ns
t
PLZ
Disable Time Low to Z
C
L =10pF
10
20
ns
t
PZH
Enable Time Z to High
(Figure 3 and Figure 4)
4
15
ns
t
PZL
Enable Time Z to Low
415
ns
Switching Characteristics
V
CC = +5.0V ± 10%, TA = −55˚C to +125˚C DS90C032E (Notes 3, 4, 5, 6, 9, 10)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHLD
Differential Propagation Delay High to Low
C
L = 20 pF
1.0
3.40
8.0
ns
t
PLHD
Differential Propagation Delay Low to High
V
ID = 200 mV
1.0
3.48
8.0
ns
t
SKD
Differential Skew |t
PHLD −tPLHD|(Figure 1 and Figure 2)
0
0.08
3.0
ns
t
SK1
Channel-to-Channel Skew (Note 5)
0
0.6
3.0
ns
t
SK2
Chip to Chip Skew (Note 6)
7.0
ns
t
PHZ
Disable Time High to Z
R
L =2k
Ω
10
20
ns
t
PLZ
Disable Time Low to Z
C
L =10pF
10
20
ns
t
PZH
Enable Time Z to High
(Figure 3 and Figure 4)
4
20
ns
t
PZL
Enable Time Z to Low
420
ns
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