TPS51116MPWPREP datasheet(3/38 Pages) TI1

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TPS51116-EP

www.ti.com

SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012

THERMAL INFORMATION

TPS51116-EP

THERMAL METRIC(1)

PWP

UNITS

20 PINS

θJA

Junction-to-ambient thermal resistance(2)

41.2

θJCtop

Junction-to-case (top) thermal resistance(3)

27.4

θJB

Junction-to-board thermal resistance(4)

23.9

°C/W

ψJT

Junction-to-top characterization parameter(5)

1.1

ψJB

Junction-to-board characterization parameter(6)

23.7

θJCbot

Junction-to-case (bottom) thermal resistance(7)

3.6

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter,

ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA , using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

Spacer

RECOMMENDED OPERATING CONDITIONS

MIN

MAX

UNIT

Supply voltage, V5IN

4.75

5.25

VBST, DRVH

–0.1

–0.6

VLDOIN, VTT, VTTSNS, VDDQSNS

–0.1

3.6

Voltage range

VTTREF

–0.1

1.8

PGND, VTTGND

–0.1

0.1

S3, S5, MODE, VDDQSET, CS, COMP, PGOOD,

–0.1

5.25

DRVL

Operating temperature range, TJ

–55

125

°C

ELECTRICAL CHARACTERISTICS

TJ = −55°C to 125°C, TJ = TA, VV5IN = 5 V, VLDOIN is connected to VDDQ output (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY CURRENT

No load, VS3 = VS5 = 5 V,

IV5IN1

Supply current 1, V5IN

0.8

COMP connected to capacitor

No load, VS3 = 0 V,

IV5IN2

Supply current 2, V5IN

300

610

VS5 = 5 V, COMP connected to capacitor

No load, VS3 = 0 V,

IV5IN3

Supply current 3, V5IN

240

508

VS5 = 5 V, VCOMP = 5 V

μA

IV5INSDN

Shutdown current, V5IN

No load, VS3 = VS5 = 0 V

0.1

1.81

IVLDOIN1

Supply current 1, VLDOIN

No load, VS3 = VS5 = 5 V

IVLDOIN2

Supply current 2, VLDOIN

No load, VS3 = 5 V, VS5 = 0 V,

0.1

10.5

IVLDOINSDN

Standby current, VLDOIN

No load, VS3 = VS5 = 0 V

0.1

1.5

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