ATS128 datasheet(18/25 Pages) ALLEGRO

18 / 25 page

Highly Programmable, Back-Biased,

Hall-Effect Switch with TPOS Functionality

ATS128LSE

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

tional VPM pulse addresses the next bit in the selected register, up

to the MSB. Read mode is available only before the LOCK bit

has been set.

After the final VPH key pulse, and after each VPM address pulse,

if VOUT is high, the corresponding fuse can be considered blown

(the status of the Output Polarity bit, POL, does not affect Read

mode output values, allowing POL to be tested also). If the output

state is low, the fuse can be considered un-blown. During Read

mode VOUT must be pulled high using a pull-up resistor (see

RLOAD in the Typical Application Circuit diagram).

Figure 13. Example of Blow mode programming pulses applied to the VCC pin. In this example, the BOP Magnitude

Selection register (BOPSEL) is addressed to code 8 (bit 3, or 3 VPM pulses) and its value is permanently blown.

Figure 12. Example of Try mode programming pulses applied to the VCC pin. In this example, BOP Positive Trim, Down-

Counting register is addressed to code 12 by the eleven VPM pulses (code 1 is selected automatically at the falling edge

of the register-mode selection key).

VPH

VPM

VPL

GND

Bit Field (Fuse)

Address Codes

1234567

9 10 11

Blow

Pulse

VPH

VPM

VPL

GND

Selection Key

Bit Field

Address Codes

1234

123456789 10 11

ATS128 bảng dữ liệu(PDF) 18 Page - Allegro MicroSystems