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TMS320C54CST bảng dữ liệu(PDF) 12 Page - Texas Instruments |
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TMS320C54CST bảng dữ liệu(HTML) 12 Page - Texas Instruments |
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12 / 171 page  Tables 12 November 2001 − Revised September 2003 SPRS187B Table Page 3−44 Register 18 − International Control 3 Bit Descriptions 87 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−45 Register 19 − International Control 4 Bit Descriptions 89 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−46 Loop Current Transfer Function 97 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−47 Current Values—Optional Ringer Impedance Network 101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−48 Component Values—Optional Billing Tone Filters 103 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−49 Country-Specific Register Settings 107 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−50 Revision Values 110 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−51 Fixed Sample Rates and Corresponding Notch Filter Component Values 112 . . . . . . . . . . . . . . . . . . . . 3−52 Bill of Materials 115 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−53 Layout Check List 122 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−54 Interrupt Locations and Priorities 127 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−1 Thermal Resistance Characteristics 133 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−2 Recommended Operating Conditions of Internal Oscillator With External Crystal (See Figure 5−2) 134 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−3 Clock Mode Pin Settings for the Divide-By-2 and By Divide-by-4 Clock Options 135 . . . . . . . . . . . . . . 5−4 Divide-By-2 and Divide-by-4 Clock Options Timing Requirements 135 . . . . . . . . . . . . . . . . . . . . . . . . . . 5−5 Divide-By-2 and Divide-by-4 Clock Options Switching Characteristics 135 . . . . . . . . . . . . . . . . . . . . . . . 5−6 Multiply-By-N Clock Option Timing Requirements 136 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−7 Multiply-By-N Clock Option Switching Characteristics 136 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−8 Memory Read Timing Requirements 137 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−9 Memory Read Switching Characteristics 137 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−10 Memory Write Switching Characteristics 140 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−11 I/O Read Timing Requirements 142 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−12 I/O Read Switching Characteristics 142 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−13 I/O Write Switching Characteristics 144 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−14 Ready Timing Requirements for Externally Generated Wait States 145 . . . . . . . . . . . . . . . . . . . . . . . . . 5−15 Ready Switching Characteristics for Externally Generated Wait States 145 . . . . . . . . . . . . . . . . . . . . . . 5−16 HOLD and HOLDA Timing Requirements 148 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−17 HOLD and HOLDA Switching Characteristics 148 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−18 Reset, BIO, Interrupt, and MP/MC Timing Requirements 149 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−19 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Switching Characteristics 151 . . . . 5−20 External Flag (XF) and TOUT Switching Characteristics 152 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−21 McBSP Transmit and Receive Timing Requirements 153 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−22 McBSP Transmit and Receive Switching Characteristics 154 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−23 McBSP General-Purpose I/O Timing Requirements 156 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−24 McBSP General-Purpose I/O Switching Characteristics 156 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−25 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0) 157 . . . . . . . . . . 5−26 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0) 157 . . . . . . 5−27 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0) 158 . . . . . . . . . . 5−28 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0) 158 . . . . . . . 5−29 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1) 159 . . . . . . . . . . 5−30 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1) 159 . . . . . . 5−31 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1) 160 . . . . . . . . . . 5−32 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1) 160 . . . . . . . 5−33 HPI8 Mode Timing Requirements 161 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−34 HPI8 Mode Switching Characteristics 162 . . . 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