TNETX3150A datasheet(48/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

port VLAN registers at 0x2*N + 0x00A4 through 0x2*N + 0x00A5 (N = port number in hex)

The VLAN registers hold broadcast destination masks for each source port when IOB is in operation. Each bit

in the VLAN register (with exception of bit 15) directly corresponds to a port (bit 14 = port 14 through bit 00 =

port 00). Broadcast and multicast frames are directed according to the VLAN register setting for the port on

which the broadcast or multicast frame was received. Each VLAN register is initialized at reset to send frames

to all other ports except itself. After reset, the registers contain the following initial values (see Table 9).

Table 9. VLAN Register Initial Values

INITIAL VALUE

DIO ADDRESS

VLAN 0 MASK

01111111

11111110

0x00A4

VLAN 1 MASK

01111111

11111101

0x00A6

VLAN 2 MASK

01111111

11111011

0x00A8

VLAN 3 MASK

01111111

11110111

0x00AA

VLAN 4 MASK

01111111

11101111

0x00AC

VLAN 5 MASK

01111111

11011111

0x00AE

VLAN 6 MASK

01111111

10111111

0x00B0

VLAN 7 MASK

01111111

0x00B2

VLAN 8 MASK

01111110

11111111

0x00B4

VLAN 9 MASK

01111101

11111111

0x00B6

VLAN 10 MASK

01111011

11111111

0x00B8

VLAN 11 MASK

01110111

11111111

0x00BA

VLAN 12 MASK

01101111

11111111

0x00BC

VLAN 13 MASK

01011111

11111111

0x00BE

VLAN 14 MASK

00111111

11111111

0x00C0

When EAM bit-map direction is in use, the VLAN registers are used to store the bit mask from the EAM. VLAN

registers can be loaded only before the DRAM initialization (before the START bit is set).

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