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A25GFM080QL bảng dữ liệu(PDF) 50 Page - AMIC Technology

tên linh kiện A25GFM080QL
Giải thích chi tiết về linh kiện  8Mbit, 3V Suspend/Resume, Dual/Quad-I/O Serial Flash Memory
PDF  58 Pages
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nhà sản xuất  AMICC [AMIC Technology]
Trang chủ  http://www.amictechnology.com
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A25LQ080 Series
(April, 2016, Version 1.0)
49
AMIC Technology Corp.
Table 15. AC Characteristics
Symbol
Alt.
Parameter
Min.
Typ.
Max.
Unit
fC
fC
Clock Frequency for all instructions, except READ (03h)
D.C.
100
MHz
fR
Clock Frequency for READ (03h) instruction
D.C.
50
MHz
tCH
1
tCLH
Clock High Time
5
ns
tCL
1
tCLL
Clock Low Time
5
ns
tCLCH
2
Clock Rise Time
3 (peak to peak)
0.1
V/ns
tCHCL
2
Clock Fall Time
3 (peak to peak)
0.1
V/ns
tSLCH
tCSS
S Active Setup Time (relative to C)
5
ns
tCHSL
S Not Active Hold Time (relative to C)
5
ns
tDVCH
tDSU
Data In Setup Time
3
ns
tCHDX
tDH
Data In Hold Time
3
ns
tCHSH
S Active Hold Time (relative to C)
5
ns
tSHCH
S Not Active Setup Time (relative to C)
5
ns
tSHSL
tCSH
S Deselect Time
30
ns
tSHQZ
2
tDIS
Output Disable Time
7
ns
tCLQV
tV
Clock Low to Output Valid
7
ns
tCLQX
tHO
Output Hold Time
0
ns
tHLCH
HOLD Setup Time (relative to C)
5
ns
tCHHH
HOLD Hold Time (relative to C)
5
ns
tHHCH
HOLD Setup Time (relative to C)
5
ns
tCHHL
HOLD Hold Time (relative to C)
5
ns
tHHQX
2
tLZ
HOLD to Output Low-Z
7
ns
tHLQZ
2
tHZ
HOLD to Output High-Z
7
ns
tWHSL
4
Write Protect Setup Time
20
ns
tSHWL
4
Write Protect Hold Time
100
ns
tDP
2
S High to Deep Power-down Mode
3
µs
tRES1
2
S High to Standby Mode without Electronic Signature Read
1
µs
tRES2
2
S High to Standby Mode with Electronic Signature Read
1
µs
tW
Write Status Register Cycle Time
5
20
ms
Page Program Cycle Time
2
6
ms
tpp
Program OTP Cycle Time
2
3
ms
tSE
Sector Erase Cycle Time
0.08
0.2
s
tBE
Block Erase Cycle Time
0.5
2
s
tCE
Chip Erase Cycle Time of A25LQ080
8
20
s
Note: 1. tCH + tCL must be greater than or equal to 1/ fC
2. Value guaranteed by characterization, not 100% tested in production.
3. Expressed as a slew-rate.
4. Only applicable as a constraint for WRSR instruction when Status Register Protect bit (SRP0) = 1



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