MCP1406-ESLASHAT datasheet(11/30 Pages) MICROCHIP

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 2006-2016 Microchip Technology Inc.

DS20002019C-page 11

MCP1406/07

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Supply Input (VDD)

VDD is the bias supply input for the MOSFET driver and

has a voltage range of 4.5V to 18V. This input must be

decoupled to ground with local capacitors. The bypass

capacitors provide a localized low-impedance path for

the peak currents that are to be provided to the load.

3.2

Control Input (INPUT)

The MOSFET driver input is a high-impedance,

TTL/CMOS-compatible input. The input also has hys-

teresis between the high and low input levels, allowing

them to be driven from slow rising and falling signals,

and to provide noise immunity.

3.3

Ground (GND)

Ground is the device return pin. The ground pin should

have a low impedance connection to the bias supply

source return. High peak currents will flow out the

ground pin when the capacitive load is being

discharged.

3.4

CMOS Push-Pull Output

(OUTPUT)

The output is a CMOS push-pull output that is capable

of sourcing peak currents of 6A (VDD = 18V). The low

output impedance ensures the gate of the external

MOSFET will stay in the intended state even during

large transients. The output pins also have reverse

current latch-up ratings of 1.5A.

3.5

Exposed Metal Pad (6x5 DFN only)

The exposed metal pad of the DFN package is not

internally connected to any potential. Therefore, this

pad can be connected to a ground plane or other

copper plane on a printed circuit board to aid in heat

removal from the package.

3.6

TO-220 Metal Tab

The metal tab on the TO-220 package is at VDD

potential. This metal tab is not intended to be the VDD

connection to MCP1406/07. VDD should be supplied

using the Supply Input pin of the TO-220.

TABLE 3-1:

PIN FUNCTION TABLE(1)

5-Pin

TO-220

8-Pin

6x5 DFN

8-Pin

PDIP, SOIC

Symbol

Description

—1

VDD

Supply Input

INPUT

Control Input

—

No Connection

GND

Ground

GND

Ground

OUTPUT

CMOS Push-Pull Output

—

OUTPUT

CMOS Push-Pull Output

VDD

Supply Input

—

Exposed Metal Pad

TAB

—

VDD

Metal Tab at VDD Potential

Note 1: Duplicate pins must be connected for proper operation.

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