MCP2003B-ESLASHSN datasheet(13/32 Pages) MICROCHIP

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 2015-2016 Microchip Technology Inc.

DS20005463C-page 13

MCP2003B

2.4

AC Specifications

AC Characteristics

Electrical Characteristics: Unless otherwise indicated, all limits are specified for

VBB = 5.5V to 27.0V

Extended (E): TA = -40°C to +125°C

High (H): TA = -40°C to +150°C

Parameter

Sym.

Min.

Typ.

Max. Units

Test Conditions

Bus Interface – Constant Slope Time Parameters

Slope Rising and Falling Edges

tSLOPE

3.5

—

22.5

µs

7.3V ≤ VBB ≤ 18V

Propagation Delay of

Transmitter

tTRANSPD

——

4.0

µs

tTRANSPD = max (tTRANSPDR or

tTRANSPDF)

Propagation Delay of Receiver

tRECPD

——

6.0

µs

tRECPD = max (tRECPDR or tRECPDF)

Symmetry of Propagation

Delay of Receiver Rising Edge

w.r.t. Falling Edge

tRECSYM

-2.0

—

2.0

µs

tRECSYM = max (tRECPDF - tRECPDR)

RRXD 2.4

 to VCC, CRXD 20 pF

Symmetry of Propagation

Delay of Transmitter Rising

Edge w.r.t. Falling Edge

tTRANSSYM

-2.0

—

2.0

µs

tTRANSSYM = max (tTRANSPDF - tTRANSPDR)

Duty Cycle 1 @20.0 kbit/sec

0.396

—

CBUS; RBUS conditions:

1nF; 1 k

 | 6.8 nF; 660 | 10 nF; 500

THREC(MAX) = 0.744 × VBB,

THDOM(MAX) = 0.581 × VBB,

VBB =7.0V - 18V; tBIT = 50 µs

D1 = tBUS_REC(MIN)/2 × tBIT)

Duty Cycle 2 @20.0 kbit/sec

—

0.581

—

CBUS; RBUS conditions:

1nF; 1 k

 | 6.8 nF; 660 | 10 nF; 500

THREC(MAX) = 0.284 × VBB,

THDOM(MAX) = 0.422 × VBB,

VBB =7.6V - 18V; tBIT = 50 µs

D2 = tBUS_REC(MAX)/2 × tBIT)

Duty Cycle 3 @10.4 kbit/sec

0.417

—

CBUS; RBUS conditions:

1nF; 1 k

 | 6.8 nF; 660 | 10 nF; 500

THREC(MAX) = 0.778 × VBB,

THDOM(MAX) = 0.616 × VBB,

VBB =7.0V – 18V; tBIT = 96 µs

D3 = tBUS_REC(MIN)/2 × tBIT)

Duty Cycle 4 @10.4 kbit/sec

—

0.590

—

CBUS; RBUS conditions:

1nF; 1 k

 | 6.8 nF; 660 | 10 nF; 500

THREC(max) = 0.251 × VBB,

THDOM(MAX) = 0.389 × VBB,

VBB =7.6V – 18V; tBIT = 96 µs

D4 = tBUS_REC(MAX)/2 × tBIT)

Wake-up Timing

Bus Activity Debounce time

tBDB

125

µs

Bus Activity to VREN on

tBACTVE

110

µs

WAKE to VREN on

tWAKE

——

150

µs

Chip Select to VREN on

tCSOR

——

150

µs

VREN floating

Chip Select to VREN off

tCSPD

—

200

µs

VREN floating

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