MCP2050 datasheet(21/40 Pages) MICROCHIP

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DS20002299C-page 21

MCP2050

Bus Interface

High-Level Input Voltage

VIH(LBUS)0.6 VBB

—

Recessive state

Low-Level Input Voltage

VIL(LBUS)-8

—

0.4 VBB

Dominant state

Input Hysteresis

VHYS

—

0.175 VBB

VVIH(LBUS) – VIL(LBUS)

Low-Level Output Current

IOL(LBUS)

—

200

Output voltage = 0.1 VBB,

VBB = 12V

Pull-Up Current on Input

IPU(LBUS)-180

—

-72

µA

~30 kΩ internal pull-up

@ VIH (LBUS) = 0.7 VBB,

VBB=12V

Short-Circuit Current Limit

ISC

—

200

(Note 1)

High-Level Output Voltage

VOH(LBUS)0.8 VBB

—VBB

Driver Dominant Voltage

V_LOSUP

——

1.1

VBB = 7.3V,

RLOAD = 1000Ω

Driver Dominant Voltage

V_HISUP

——

1.2

VBB = 18V,

RLOAD = 1000Ω

Input Leakage Current

(at the receiver during

dominant bus level)

IBUS_PAS_

DOM

-1

—

Driver off,

VBUS = 0V,

VBB = 12V

Input Leakage Current

(at the receiver during

recessive bus level)

IBUS_PAS_

REC

-20

—

µA

Driver off,

8V < VBB < 18V

8V < VBUs < 18V

VBUS

 VBB

Leakage Current

(disconnected from ground)

IBUS_NO_G

-10

—

+10

µA

GNDDEVICE = VBB,

0V < VBUS < 18V,

VBB = 12V

Leakage Current

(disconnected from VBB)

IBUS_NO_P

-10

—

+10

µA

VBB = GND,

0 < VBUS < 18V

Receiver Center Voltage

VBUS_CNT

0.475 VBB

0.5

VBB

0.525 VBB

VVBUS_CNT = (VIL (LBUS) +

VIH (LBUS))/2

Slave Termination

RSLAVE

kΩ

(Note 2)

Capacitance of slave node

CSLAVE

(Note 2)

Wake-Up Voltage

Threshold on LIN Bus

VWK(LBUS)

—

3.4

Wake up from Power-

Down mode (Note 3)

2.3

DC Specifications (Continued)

DC Specifications

Electrical Characteristics:

Unless otherwise indicated, all limits are specified for:

VBB = 6.0V to 18.0V, TA = -40°C to +125°C

CREG = 10 µF

Parameter

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1:

Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0Ω, TX = 0, VLBUS = VBB).

Characterized, not 100% tested.

In Power-Down mode, normal LIN recessive/dominant threshold is disabled; VWK(LBUS) is used to detect

bus activities.

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