TMS320LC2402APGS datasheet(78/134 Pages) TI1

78 / 134 page

TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A

TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A

DSP CONTROLLERS

SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PARAMETER MEASUREMENT INFORMATION

Tester Pin

Electronics

VLOAD

IOL

IOH

Output

Under

Test

50 Ω

Where:

IOL

2 mA (all outputs)

IOH

300 µA (all outputs)

VLOAD

1.5 V

50-pF typical load-circuit capacitance

Figure 24. Test Load Circuit

signal transition levels

The data in this section is shown for the 3.3-V version. Note that some of the signals use different reference

voltages, see the recommended operating conditions table. Output levels are driven to a minimum logic-high

level of 2.4 V and to a maximum logic-low level of 0.4 V.

Figure 25 shows output levels.

0.4 V (VOL)

20%

2.4 V (VOH)

80%

Figure 25. Output Levels

Output transition times are specified as follows:

D For a high-to-low transition, the level at which the output is said to be no longer high is below 80% of the

total voltage range and lower and the level at which the output is said to be low is 20% of the total voltage

range and lower.

D For alow-to-high transition, the level at which the output is said to be no longer low is 20% of the total voltage

range and higher and the level at which the output is said to be high is 80% of the total voltage range and

higher.

Figure 26 shows the input levels.

0.8 V (VIL)

10%

2.0 V (VIH)

90%

Figure 26. Input Levels

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