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ESD Test Conditions

Human-Body Model (HBM)

-

+

DUT

R

D

1.5kW

V

HBM

100pF

C

S

100

150

200

50

0

1.5

1.0

0.5

0.0

V

=2kV

HBM

DUT=10-V,1-W ZenerDiode

|

Time-ns

Machine Model (MM)

MAX202

5-V DUAL RS-232 LINE DRIVER/RECEIVER

WITH

±15-kV ESD PROTECTION

SLLS576E – JULY 2003 – REVISED APRIL 2007

APPLICATION INFORMATION (continued)

Stringent ESD testing is performed by TI, based on various conditions and procedures. Please contact TI for a

reliability report that documents test setup, methodology, and results.

The HBM of ESD testing is shown in Figure 5. Figure 6 shows the current waveform that is generated during a

discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of

concern, and subsequently discharged into the device under test (DUT) through a 1.5-k

Ω resistor.

Figure 5. HBM ESD Test Circuit

Figure 6. Typical HBM Current Waveform

The MM ESD test applies to all pins using a 200-pF capacitor with no discharge resistance. The purpose of the

MM test is to simulate possible ESD conditions that can occur during the handling and assembly processes of

manufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins. However, after PC

board assembly, the MM test no longer is as pertinent to the RS-232 pins.

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