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FTLC1152RGPL bảng dữ liệu(PDF) 3 Page - Finisar Corporation. |
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FTLC1152RGPL bảng dữ liệu(HTML) 3 Page - Finisar Corporation. |
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3 / 7 page ![]() FTLC1152RGPL Product Specification – May 2016 Finisar Corporation – 7-May-2016 Rev. B1 Page 3 30 Vcc1 +3.3 V Power Supply 31 LPMode Low Power Mode 32 GND Ground 1 33 Tx3p Transmitter Non-Inverted Data Input 34 Tx3n Transmitter Inverted Data Input 35 GND Ground 1 36 Tx1p Transmitter Non-Inverted Data Input 37 Tx1n Transmitter Inverted Data Input 38 GND Ground 1 Notes 1. Circuit ground is internally isolated from chassis ground. II. Absolute Maximum Ratings Module performance is not guaranteed beyond the operating range (see Section VI). Exceeding the limits below may damage the transceiver module permanently. Parameter Symbol Min Typ Max Unit Ref. Maximum Supply Voltage Vcc -0.5 3.6 V Storage Temperature TS -40 +85 C Case Operating Temperature TOP 0 +70 C Relative Humidity RH 15 85 % 1 Receiver Damage Threshold, per Lane PRdmg 5.5 dBm Notes: 1. Non-condensing. III. Electrical Characteristics (EOL, TOP = 0 to +70 C, VCC = 3.135 to 3.465 Volts) Parameter Symbol Min Typ Max Unit Ref. Supply Voltage Vcc 3.135 3.465 V Supply Current Icc 1.12 A Module total power P 3.5 W 1 Transmitter Signaling rate per lane 25.78125 ± 100 ppm GBd Differential data input swing per lane Vin,pp 900 mV Differential input return loss (min) RLd(f) 9.5 – 0.37f, 0.01≤f<8 4.75 – 7.4log10(f/14), 8 ≤f<19 dB Differential to common mode input return loss (min) RLdc(f) 22-20(f/25.78), 0.01≤f<12.89 15-6(f/25.78), 12.89≤f<19 dB Differential termination mismatch 10 % Stressed input parameters Eye width 0.46 UI Applied pk-pk sinusoidal jitter Per IEEE 802.3bm Table 88-13 Eye height 95 mV DC common mode voltage -350 2850 mV Receiver Signaling rate per lane 25.78125 ± 100 ppm GBd Differential data output swing Vout,pp 100 400 mVpp 2 300 600 400 800 600 1200 Eye width 0.57 UI |
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