P89LPC901FD datasheet(8/55 Pages) PHILIPS

8 / 55 page

Philips Semiconductors

P89LPC901/902/903

8-bit microcontrollers with two-clock 80C51 core

Product data

Rev. 04 — 21 November 2003

8 of 55

9397 750 12293

5.2 Pin description

Fig 8.

P89LPC903 pinning (SO8).

handbook, halfpage

002aaa440

VSS

P0.4/CIN1A/KBI4

P0.5/CMPREF/KBI5

P1.0/TxD

VDD

P0.2/CIN2A/KBI2

P1.1/RxD

RST/P1.5

Table 3:

P89LPC901 pin description

Symbol

Type

Description

P0.0 - P0.6

6, 7

I/O

Port 0: Port 0 is an I/O port with a user-conﬁgurable output type. During reset Port 0

latches are conﬁgured in the input only mode with the internal pull-up disabled. The

operation of Port 0 pins as inputs and outputs depends upon the port conﬁguration

selected. Each port pin is conﬁgured independently. Refer to Section 8.12.1 “Port

conﬁgurations” and Table 13 “DC electrical characteristics” for details.

The Keypad Interrupt feature operates with Port 0 pins.

All pins have Schmitt triggered inputs.

Port 0 also provides various special functions as described below:

I/O

P0.4 — Port 0 bit 4.

CIN1A — Comparator 1 positive input.

KBI4 — Keyboard input 4.

I/O

P0.5 — Port 0 bit 5.

CMPREF — Comparator reference (negative) input.

KBI5 — Keyboard input 5.

P1.0 - P1.5

4, 5

Port 1: Port 1 is an I/O port with a user-conﬁgurable output type. During reset Port 1

latches are conﬁgured in the input only mode with the internal pull-up disabled. The

operation of the conﬁgurable Port 1 pins as inputs and outputs depends upon the

port conﬁguration selected. Each of the conﬁgurable port pins are programmed

independently. Refer to Section 8.12.1 “Port conﬁgurations” and Table 13 “DC

electrical characteristics” for details. P1.5 is input only.

All pins have Schmitt triggered inputs.

Port 1 also provides various special functions as described below:

I/O

P1.2 — Port 1 bit 2.

T0 — Timer/counter 0 external count input or overﬂow output.

P1.5 — Port 1 bit 5 (input only).

RST — External Reset input during Power-on or if selected via UCFG1. When

functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O

ports and peripherals to take on their default states, and the processor begins

execution at address 0. Also used during a power-on sequence to force In-System

Programming mode.

P89LPC901FD bảng dữ liệu(PDF) 8 Page - NXP Semiconductors

P89LPC901FD bảng dữ liệu(HTML) 8 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

bảng dữ liệu tải về

Link URL