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LP8725TLE-A/NOPB bảng dữ liệu(PDF) 20 Page - Texas Instruments

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LP8725TLE-A/NOPB bảng dữ liệu(HTML) 20 Page - Texas Instruments

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LP8725
SNVS618G – DECEMBER 2009 – REVISED MAY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1) (2)
VIN1
-0.3V to +6V
VIN2, VIN3, VINLILO1, VINLILO2, VINB1, VINB2
-0.3V to VIN1+0.3V and <6.0V
Logic and control pins: Voltage to GND
-0.3V to VIN1+0.3V and <6.0V
Continuous Power Dissipation(3)
Internally Limited
Junction Temperature (TJ-MAX)
150°C
Storage Temperature Range
-65 to 150°C
ESD Rating(4)
Human Body Model
2kV
Machine Model
200V
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to the potential at the GND pin.
(3)
Internal thermal shutdown circuitry protects the device fro permanent damage. Thermal shutdown engages at TJ = 150°C (typ.) and
disengages at TJ = 130°C.
(4)
The human-body model is 100 pF discharged through 1.5 k
Ω. The machine model is a 200 pF capacitor discharged directly into each
pin, MIL-STD-883 3015.7.
OPERATING RATINGS
(1) (2)
VIN1
2.6 to 4.5V
VIN2, VIN3, VINB1, VINB2
2.6V to VIN1
VINLILO1, VINLILO2
1.8V to VIN1
All input-only pins
0V to VIN1
Junction Temperature (TJ)
-40 to 125°C
Ambient Temperature (TA)
(3)
-40 to 85°C
Maximum Power Dissipation (TA = 70°C)
1.3 W
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to the potential at the GND pin.
(3)
In applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have to
be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), The
maximum power dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (θJA)
in the application, as given by the following equation: TA-MAX = TJ-MAX JA x PD-MAX). Due to the pulsed nature of testing the part, the
temp in the Electrical Characteristic table is specified as TA = TJ.
THERMAL PROPERTIES
Junction-to-Ambient Thermal Resistance (
θJA)
(1), θ
JA 4–Layer JEDEC Board
(2)
41°C/W
(1)
In applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have to
be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), The
maximum power dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (θJA)
in the application, as given by the following equation: TA-MAX = TJ-MAX JA x PD-MAX). Due to the pulsed nature of testing the part, the
temp in the Electrical Characteristic table is specified as TA = TJ.
(2)
Junction-to-ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation
exists, special care must be given to thermal dissipation issues in board design.
20
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