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CW01 bảng dữ liệu(PDF) 7 Page - Supertex, Inc

tên linh kiện CW01
Giải thích chi tiết về linh kiện  Four-Channel, Low Phase Noise, Low Power, Continuous Wave Transmitter
PDF  8 Pages
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nhà sản xuất  SUTEX [Supertex, Inc]
Trang chủ  http://www.supertex.com
Logo SUTEX - Supertex, Inc

CW01 bảng dữ liệu(HTML) 7 Page - Supertex, Inc

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7
CW01
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
Pin Configuration and Description
Pin #
Function
Description
1
D
IN1
D flip-flop logic input for HV
OUT1. Logic high will turn on output N-channel.
2
D
IN2
D flip-flop logic input for HV
OUT2. Logic high will turn on output N-channel.
3
VDD
Level translator supply. Should be at the same potential as V
DX.
4
CLK
Logic clock input.
5
VSS
Ground. Should be externally shorted to all PGND and VSS pins.
6
D
IN3
D flip-flop logic input for HV
OUT3. Logic high will turn on output N-channel.
7
D
IN4
D flip-flop logic input for HV
OUT4. Logic high will turn on output N-channel.
8
VLL
Logic input supply voltage.
9
VSS
Ground. Should be externally shorted to all PGND and VSS pins.
10
VD4
Gate drive supply voltage for HV
OUT4. Should be at the same potential as VDD.
11
VD3
Gate drive supply voltage for HV
OUT3. Should be at the same potential as VDD.
12
PGND4
Power ground for HV
OUT4. Should be externally shorted to all PGND and VSS pins.
13
HV
OUT4
Drain output for HV
OUT4.
14
PGND3
Power ground for HV
OUT3. Should be externally shorted to all PGND and VSS pins.
15
HV
OUT3
Drain output for HV
OUT3.
16
VSS
Ground. Should be externally shorted to all PGND and VSS pins.
17
HV
OUT2
Drain output for HV
OUT2.
18
PGND2
Power ground for HV
OUT2. Should be externally shorted to all PGND and VSS pins.
19
HV
OUT1
Drain output for HV
OUT1.
20
PGND1
Power ground for HV
OUT1. Should be externally shorted to all PGND and VSS pins.
21
VD2
Gate drive supply voltage for HV
OUT2. Should be at the same potential as VDD.
22
VD1
Gate drive supply voltage for HV
OUT1. Should be at the same potential as VDD.
23
VSS
Ground. Should be externally shorted to all PGND and VSS pins.
24
OE
Output enable logic input. Logic low will turn all HV
OUT off.
Center
Pad
---
Should be externally shorted to all PGND and VSS pins.



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