24LC00-ESLASHP datasheet(3/34 Pages) MICROCHIP

3 / 34 page

 1996-2011 Microchip Technology Inc.

DS21178H-page 3

24AA00/24LC00/24C00

TABLE 1-2:

AC CHARACTERISTICS

All Parameters apply across all

recommended operating ranges

unless otherwise noted

Industrial (I):

TA = -40°C to +85°C,

VCC = 1.8V to 5.5V

Automotive (E):

TA = -40°C to +125°C, VCC = 4.5V to 5.5V

Parameter

Symbol

Min

Max

Units

Conditions

Clock frequency

FCLK

—

100

400

kHz

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Clock high time

THIGH

4000

600

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Clock low time

TLOW

4700

1300

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

SDA and SCL rise time

(Note 1)

—

1000

300

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

SDA and SCL fall time

—300

(Note 1)

Start condition hold time

THD:STA

4000

600

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Start condition setup time

TSU:STA

4700

600

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Data input hold time

THD:DAT

0—

(Note 2)

Data input setup time

TSU:DAT

250

100

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Stop condition setup time

TSU:STO

4000

600

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Output valid from clock

(Note 2)

TAA

—

3500

900

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Bus free time: Time the bus must

be free before a new transmis-

sion can start

TBUF

4700

1300

—

4.5V

Vcc  5.5V (E Temp range)

1.8V

Vcc 4.5V

4.5V

Vcc  5.5V

Output fall time from VIH

minimum to VIL maximum

TOF

20+0.1

250

(Note 1), CB

100 pF

Input filter spike suppression

(SDA and SCL pins)

TSP

—50

(Notes 1, 3)

Write cycle time

TWC

—4

Endurance

—

cycles (Note 4)

Note 1:

Not 100% tested. CB = total capacitance of one bus line in pF.

As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained at www.microchip.com.

24LC00-E/P bảng dữ liệu(PDF) 3 Page - Microchip Technology

24LC00-E/P bảng dữ liệu(HTML) 3 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

bảng dữ liệu tải về

Link URL