L4979D datasheet(6/10 Pages) STMICROELECTRONICS

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L4979MD L4979D

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and reset pulse delay trd is given by:

trd = 512 x Tosc

Figure 5. Reset Time Diagram.

WATCHDOG

The watchdog input Wi monitors a connected microcontroller. If pulses are missing, the reset output Res is

set to low. The pulse sequence time can be set within a wide range thorough the external capacitor Ctw. The

watchdog circuit discharges the capacitor Ctw with the constant current Icwd. If the lower threshold Vwlth is

reached, a watchdog reset is generated. To prevent this reset, the microcontroller must generate a positive edge

during the discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to calculate

the minimum time Tdis during which the microcontroller must generate the positive edge, the following equation

can be used:

(Vwhth - Vwlth) x Ctw = Icwd x Tdis

Each Wi positive edge switches the current source from discharging to charging; the same happens when the

lower Vwlth threshold is reached. When the voltage reaches the upper threshold Vwhth the current switches from

charging to discharging. The result is a saw tooth voltage at the watchdog timer capacitor Ctw.

Figure 6. Watchdog time diagram

osc

rhth

rlth

–

() C

⋅

[]

------------------------------------------------------

rhth

rlth

–

() C

⋅

[]

------------------------------------------------------

trr

< trr

trd = 512 T osc

Tosc

Vrhth

Vrlth

Res

Vcr

V out_th

Res

Vcw

Vwlth

Vwhth

twol

Twop

Tdis

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