TAS5716PAPR datasheet(11/64 Pages) TI1

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ELECTRICAL CHARACTERISTICS

TAS5716

www.ti.com............................................................................................................................................................................................... SLOS569 – JANUARY 2009

DC Characteristics, TA = 25°C, PVCC_X, AVCC = 18 V, RL = 8 Ω (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT

VOH

High-level output voltage

3.3-V TTL and 5-V tolerant (1)

IOH = –4 mA

2.4

VOL

Low-level output voltage

3.3-V TTL and 5-V tolerant (1)

IOL = 4 mA

0.5

| VOS |

Class-D output offset voltage

±26

VBYPASS

PVCC/8 reference for analog section

No load

2.2

2.26

2.3

3.3-V TTL

VI = VIL

±2

IIL

Low-level input current

µA

5-V tolerant(1)

VI = 0 V, DVDD = 3 V

±2

3.3-V TTL

VI = VIH

±2

IIH

High-level input current

µA

5-V tolerant

VI = 5.5 V, DVDD = 3 V

±20

Normal mode

Power down

IDD

Input supply current

Supply voltage (DVDD, AVDD)

(PDNZ = LOW)

Reset (RESET = LOW)

ICC

Quiescent supply current

No load

ICC(RESET)

Quiescent supply current in reset mode

No load

176

µA

ICC(PDNZ)

Quiescent supply current in power-down mode

No load

176

µA

PSRR

DC power-supply rejection ratio

PVCC = 17.5 V to 18.5 V

Drain-source on-state resistance, high-side

VCC = 18 V , IO = 500 mA,

240

TJ = 25°C

RDS(on)

Low-side

240

Ω

Total

480

850

Turnon time (SE mode) (Set Reg 0x1A bit 7 to 1)

C(BYPASS) = 1 µF,

500

tON

Time required for C(BYPASS)

Turnon time (BTL mode) (Set Reg 0x1A bit 7 to 0)

to reach its final value

Turnoff time (SE mode) (Set Reg 0X1A bit 7 to 1)

500

tOFF

Turnoff time (BTL mode) (Set Reg 0X1A bit 7 to 0)

(1)

5-V tolerant pins are PDN, RESET, MUTE, SCLK, LRCLK, MCLK, SDIN1, SDIN2, SDA, SCL, and HPSEL.

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