TAS5716PAP datasheet(49/64 Pages) TI1

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VOLUME CONFIGURATION REGISTER (0x0E)

MODULATION LIMIT REGISTER (0x10)

TAS5716

www.ti.com............................................................................................................................................................................................... SLOS569 – JANUARY 2009

Bit D7:

Reserved = 1

Bit D6:

If 0, then biquad 1 (BQ1) volume compensation part only is disabled (default). If 1, then BQ1

volume compensation is enabled.

Bit D4:

Reserved = 1

Bit D3:

Reserved

Bits D2–D0:

Volume slew rate (Used to control volume change and MUTE ramp rates)

Table 12. Volume Control Register (0x0E)

FUNCTION

–

Reserved (must be 1) (1)

–

Disable biquad volume compensation(1)

–

Enable biquad volume compensation

–

Reserved(1)

–

Reserved (must be 1)(1)

–

Reserved(1)

–

Volume slew 512 steps (44 ms volume ramp time)

–

Volume slew 1024 steps(1) (88 ms volume ramp time)

–

Volume slew 2048 steps (176 ms volume ramp time)

–

Volume slew 256 steps (22 ms volume ramp time)

–

Reserved

(1)

Default values are in bold.

Set modulation limit. See the appropriate power stage data sheet for recommended modulation limits.

Table 13. Modulation Limit Register (0x10)

LIMIT

MIN WIDTH [DCLKs]

MODULATION LIMIT

[DCLKs]

–

99.2%

–

98.4%

–

97.7% (1)

–

96.9%

–

96.1%

–

95.3%

–

94.5%

–

93.8%

(1)

Default values are in bold.

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