LM7372

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SNOS926F – MAY 1999 – REVISED SEPTEMBER 2014

10 Layout

10.1 Layout Guidelines

Generally, a good high-frequency layout will keep power supply and ground traces away from the inverting input

and output pins. Parasitic capacitance on these nodes to ground will cause frequency response peaking and

possible circuit oscillations (see Application Note OA-15, "Frequent Faux Pas in Applying Wideband Current

Feedback Amplifiers", SNOA367, for more information). Texas Instruments suggests the following evaluation

boards as a guide for high frequency layout and as an aid in device testing and characterization:

Table 4. Printed Circuit Board Layout and Evaluation Boards

DEVICE

PACKAGE

EVALUATION BOARD PN

LM7372MA

16-Pin SOIC

None

LM7372MR

8-Pin SO PowerPAD

LMH730121

See the respective Evaluation Board documentation.

11 Device and Documentation Support

11.1 Trademarks

VIP is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.2 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.3 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 1999–2014, Texas Instruments Incorporated

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