DP84910 datasheet(17/32 Pages) NSC

17 / 32 page

AC Electrical CharacteristicsPulse Detector (Continued)

Note 8

Enable internal pulse detector signals through the control register Measure the time from the falling edge of SCAP4 pin to the rising edge of SCAP3 pin as

the programmable gate channel delay step is changed tDS e the incremental delay change per step

Note 9

Enable pulse detector output at ERDO via the control register The 33 MHz pulse pairing measurement is made with the channel filter programmed for

5 MHz b3 dB bandwidth with 0 dB peaking The 7 MHz pulse pairing measurement is made with the channel filter programmed for 10 MHz b3 dB bandwith with

0 dB peaking

Note 10

Pulse detector is initially powered down for 25 ms prior to powering on

Note 11

The pulse detector is initially powered down for 2 ms Recovery time is measured from the deassertion of the IDLESERVO pin to the rising edge of

ERDO

Note 12

Typical values are specified at 25 C and 5V supply

Note 13

The limit value has been determined by a characterization data No outgoing test is performed

AC Electrical CharacteristicsSynchronizer and Synthesizer guaranteed over operat-

ing temperature and supply voltage ranges unless otherwise specified Minimum andor maximum limits are guaranteed by

outgoing testing unless otherwise specified

Symbol

Func

Parameter

Conditions

Min

Typ

Max

Units

Block

(Note 8)

tT-SYNC

Synch

Synchronizer Window Loss

Strobe M e 0

167 Mbs

333 Mbs

50 Mbs

125

iLIN-PH

Synch

Phase Detector

Phase Lock

rad

Retrace Angle

(Notes 6 9)

KVCO-SYNC

Synch

Synchronizer VCO Gain

25 C Only

0250o

0450o

0650o

radVs

(Note 1)

tSD0

Synch

SCK Negative Edge to

(Note 4)

SD Negative Edge

tSD1

Synch

SCK Negative Edge to

(Note 4)

SD Positive Edge

tZPSR

Synch

Zero-Phase Start

Entering READ Mode

2ns

Accuracy Absolute Value

(Note 4)

tSFIX

Synch

Strobe per Step Size

(Note 9)

2to a2

tSVAR

Synch

Strobe per Step Size

(Notes 2 and 9)

0625 c tVCO

2to b6 2to6

tPW-SCK

Synch

SCK Output Pulse Width

(Note 5)

075 tw

125 tw

tb3 dB-KVCO

Synch

VCO Control Block

(Note 9)

MHz

3 dB Rolloff

tb3 dB-CP

Synch

Charge Pump Block

(Note 9)

MHz

3 dB Rolloff

tPWSTH

Synth

Synthesizer Output

(Note 5)

33 Mbs

tw b 5tw a 5

Pulse Width

50 Mbs

tw b 325

tw a 325

KVCO-SYNTH

Synth

Synthesizer VCO Gain

(Notes 1 and 5) See

graph on next page

1230o

140o

1550o

radVs

25 C Only

fb3 dB-KSTH

Synth

VCO Control Block

(Note 9)

MHz

3 dB Rolloff

Note 1

0o is the operating frequency of the synchronizer VCO This parameter is specified at 25 C ambient only KVCO varies inversely with absolute (Kelvin)

temperature KVCO (T) e KVCO (25 C) c 298T where T is in degrees Kelvin

Note 2

tVCO is the period of the synchronizer VCO The period is equal to the code rate clock period

Note 3

Add to this value the data rate dependent delay time term TBD% c TVCO Note 2 also applies

Note 4

Parameter guaranteed by design or correlation to characterization data No outgoing tests are performed

Note 5

tw e 05 c respective clock period

Note 6

The parameter is measured with respect to the code rate clock period

Note 7

Using standard static window measurement See DP84910 Design Guide DP849192 or DP845859 data sheets for description of static window test

Note 8

Typical values are specified at 25 C and 5V supply

Note 9

This parameter is provided as information only

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