LM3525

SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013

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Adequate capacitance must be connected to the input of the device to limit the input voltage drop during a hot-

plug event to less than 330 mV. For a few tens of µs, the host must supply the inrush current to the peripheral,

tantalum capacitor is recommended.

In choosing the capacitors, special attention must be paid to the Effective Series Resistance, ESR, of the

capacitors to minimize the IR drop across the capacitor's ESR.

SOFT START

To eliminate the upstream voltage droop caused by the high in-rush current drawn by the output capacitors, the

inrush current is internally limited to 1.0A.

TRANSIENT OVER-CURRENT DELAY

In USB applications, it is required that output bulk capacitance is utilized to support hot-plug events. During hot-

plug events, inrush currents may also cause the flag to go active. Since these conditions are not valid over-

current faults, the USB controller must ignore the flag during these events.

High transient current is also generated when switch is enabled and large values of capacitance at the output

have to be rapidly charged. The inrush currents created could exceed the short circuit current limit threshold of

the device forcing it into the current limit mode. The capacitor is charged with the maximum available short circuit

current set by the LM3525. The duration of the inrush current depends on the size of the output capacitance and

load current. Since this is not a valid fault condition, the LM3525 delays the generation of the fault flag for 1 ms.

If condition persists due to other causes such as a short, a fault flag is generated after a 1 ms delay has elapsed.

The LM3525's 1 ms delay in issuing the fault flag is adequate for most applications. If longer delays are required,

an RC filter as shown in Figure 14 may be used.

Figure 14. Transient Fitter

PCB LAYOUT CONSIDERATIONS

In order to meet the USB requirements for voltage drop, droop and EMI, each component used in this circuit

must be evaluated for its contribution to the circuit performance as shown in Figure 15. The PCB layout rules and

guidelines must be followed.

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•

Avoid vias as much as possible. If vias are used, use multiple vias in parallel and/or make them as large as

possible.

•

Place the output capacitor and ferrite beads as close to the USB connector as possible.

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If ferrite beads are used, use wires with minimum resistance and large solder pads to minimize connection

resistance.

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