LM3421 datasheet(21/72 Pages) TI1

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HYS

¨¨

¸¸

(

)

UVH

HYS

TURN

24V

1.24V

23 2A

LM3421/23

RUV2

RUV1

VIN

UVLO

nDIM

RUVH

(optional)

LM3421, LM3421-Q1, LM3423, LM3423-Q1

www.ti.com

SNVS574F – JULY 2008 – REVISED JULY 2015

Feature Description (continued)

Figure 23. UVLO Circuit

When using the nDIM pin for UVLO and PWM dimming concurrently, the UVLO circuit can have an extra series

resistor to set the hysteresis. This allows the standard resistor divider to have smaller resistor values minimizing

PWM delays due to a pulldown MOSFET at the nDIM pin (see PWM Dimming section). In general, at least 3 V of

hysteresis is preferable when PWM dimming, if operating near the UVLO threshold.

The turnon threshold (VTURN-ON) is defined using Equation 26.

(26)

The hysteresis (VHYS) is defined as follows:

7.3.11.1 UVLO Only

(27)

7.3.11.2 PWM Dimming and UVLO

(28)

When zero current shutdown and UVLO are implemented together, the EN pin can be used to escape UVLO.

The nDIM pin will pull up to VIN when EN is pulled low; therefore, if VIN is within the UVLO hysteretic window

when EN is pulled high again, the controller will start-up even though VTURN-ON is not exceeded.

7.3.12 PWM Dimming

The active low nDIM pin can be driven with a PWM signal which controls the main NFET and the dimming FET

(dimFET). The brightness of the LEDs can be varied by modulating the duty cycle of this signal. LED brightness

is approximately proportional to the PWM signal duty cycle, (that is, 30% duty cycle equals approximately 30%

LED brightness). This function can be ignored if PWM dimming is not required by using nDIM solely as a VIN

UVLO input as described in Input Undervoltage Lockout (UVLO) or by tying it directly to VCC or VIN.

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