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WM8958 bảng dữ liệu(PDF) 39 Page - Wolfson Microelectronics plc

tên linh kiện WM8958
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WM8958 bảng dữ liệu(HTML) 39 Page - Wolfson Microelectronics plc

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Pre-Production
WM8958
w
PP, August 2012, Rev 3.4
39
DIGITAL AUDIO INTERFACE - TDM MODE
When TDM operation is used on the ADCDATn pins, it is important that two devices do not attempt to
drive the ADCDATn pin simultaneously. To support this requirement, the ADCDATn pins can be
configured to be tri-stated when not outputting data.
The timing of the WM8958 ADCDATn tri-stating at the start and end of the data transmission is
described in Figure 6 below.
Figure 6 Audio Interface Timing - TDM Mode
Test Conditions
The following timing information is valid across the full range of recommended operating conditions.
PARAMETER
MIN
TYP
MAX
UNIT
TDM Timing - Master Mode
ADCDAT setup time from BCLK falling edge
0
ns
ADCDAT release time from BCLK falling edge
15
ns
TDM Timing - Slave Mode
ADCDAT setup time from BCLK falling edge
5
ns
ADCDAT release time from BCLK falling edge
32
ns



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