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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DP83916 bảng dữ liệu(PDF) 35 Page - National Semiconductor (TI) |
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DP83916 bảng dữ liệu(HTML) 35 Page - National Semiconductor (TI) |
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35 / 96 page  40 SONIC-16 Registers (Continued) 435 Interrupt Mask Register (RAk50l e 4h) This register masks the interrupts that can be generated from the ISR (Figure 4 – 8) Writing a ‘‘1’’ to the bit enables the corresponding interrupt During a hardware reset all mask bits are cleared 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 BREN HBLEN LCDEN PINTEN PRXEN PTXEN TXEREN TCEN RDEEN RBEEN RBAEEN CRCEN FAEEN MPEN RFOEN rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rwereadwrite FIGURE 4-8 Interrupt Mask Register Field Meaning BREN BUS RETRY OCCURRED ENABLE HBLEN HEARTBEAT LOST ENABLE LCDEN LOAD CAM DONE INTERRUPT ENABLE PINTEN PROGRAMMABLE INTERRUPT ENABLE PRXEN PACKET RECEIVED ENABLE PTXEN PACKET TRANSMITTED OK ENABLE TXEREN TRANSMIT ERROR ENABLE TCEN TIMER COMPLETE ENABLE RDEEN RECEIVE DESCRIPTORS ENABLE RBEEN RECEIVE BUFFERS EXHAUSTED ENABLE RBAEEN RECEIVE BUFFER AREA EXCEEDED ENABLE CRCEN CRC TALLY COUNTER WARNING ENABLE FAEEN FAE TALLY COUNTER WARNING ENABLE MPEN MP TALLY COUNTER WARNING ENABLE RFOEN RECEIVE FIFO OVERRUN ENABLE Bit Description 15 Must be 0 14 BREN BUS RETRY OCCURRED enabled 0 disable 1 enables interrupts when a Bus Retry operation is requested 13 HBLEN HEARTBEAT LOST enable 0 disable 1 enables interrupts when a heartbeat lost condition occurs 12 LCDEN LOAD CAM DONE INTERRUPT enable 0 disable 1 enables interrupts when the Load CAM command has finished 11 PINTEN PROGRAMMABLE INTERRUPT enable 0 disable 1 enables programmable interrupts to occur when the PINTR bit the TXpktconfig field is set to a ‘‘1’’ 10 PRXEN PACKET RECEIVED enable 0 disable 1 enables interrupts for packets accepted 9 PTXEN PACKET TRANSMITTED OK enable 0 disable 1 enables interrupts for transmit completions 8 TXEREN TRANSMIT ERROR enable 0 disable 1 enables interrupts for packets transmitted with error 35 |
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