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CDCVF2310MPWREP bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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CDCVF2310MPWREP bảng dữ liệu(HTML) 6 Page - Texas Instruments |
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6 / 16 page ![]() CDCVF2310-EP SCAS934 – DECEMBER 2012 www.ti.com TIMING REQUIREMENTS over recommended ranges of supply voltage and operating junction temperature MIN NOM MAX UNIT VDD = 3 V to 3.6 V 0 200 fclk Clock frequency MHz VDD = 2.3 V to 2.7 V 0 170 JITTER CHARACTERISTICS Characterized using CDCVF2310 Performance EVM when VDD=3.3 V. Outputs not under test are terminated to 50 Ω. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 12 kHz to 5 MHz, fout = 30.72 MHz 52 tjitter Additive phase jitter from input to output 1Y0 fs rms 12 kHz to 20 MHz, fout = 125 MHz 45 SWITCHING CHARACTERISTICS over recommended operating junction temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDD = 3.3 V ±0.3 V (see Figure 2) tPLH f = 0 MHz to 200 MHz CLK to Yn 1.3 3.3 ns For circuit load, see Figure 2. tPHL tsk(o) Output skew (Ym to Yn) (1) (see Figure 4) 100 ps tsk(p) Pulse skew (see Figure 5) 570 ps tsk(pp) Part-to-part skew 500 ps tr Rise time (see Figure 3) VO = 0.4 V to 2 V 0.7 2.2 V/ns tf Fall time (see Figure 3) VO = 2 V to 0.4 V 0.7 2.2 V/ns tsu(en) Enable setup time, G_high before CLK ↓ 0.1 ns tsu(dis) Disable setup time, G_low before CLK ↓ 0.1 ns th(en) Enable hold time, G_high after CLK ↓ 0.4 ns th(dis) Disable hold time, G_low after CLK ↓ 0.4 ns VDD = 2.5 V ±0.2 V (see Figure 2) tPLH f = 0 MHz to 170 MHz CLK to Yn 1.5 4 ns For circuit load, see Figure 2. tPHL tsk(o) Output skew (Ym to Yn) (1) (see Figure 4 ) 170 ps tsk(p) Pulse skew (see Figure 5) 680 ps tsk(pp) Part-to-part skew 600 ps tr Rise time (see Figure 3) VO = 0.4 V to 1.7 V 0.5 1.4 V/ns tf Fall time (see Figure 3) VO = 1.7 V to 0.4 V 0.5 1.4 V/ns tsu(en) Enable setup time, G_high before CLK ↓ 0.1 ns tsu(dis) Disable setup time, G_low before CLK ↓ 0.1 ns th(en) Enable hold time, G_high after CLK ↓ 0.4 ns th(dis) Disable hold time, G_low after CLK ↓ 0.4 ns (1) The tsk(o) specification is only valid for equal loading of all outputs. 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: CDCVF2310-EP |
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