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CD74FCT574 bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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CD74FCT574 bảng dữ liệu(HTML) 2 Page - Texas Instruments |
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2 / 11 page ![]() CD74FCT574 BiCMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCBS745 – JULY 2000 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic symbol† OE 1D 2 1D 3 2D 4 3D 5 4D 6 5D 11 CLK 1Q 19 2Q 18 3Q 17 4Q 16 5Q 15 6Q 14 7Q 13 8Q 12 7 6D 8 7D 9 8D EN 1 C1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) OE CLK 1D 1Q 1 11 2 19 To Seven Other Channels 1D C1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ DC supply voltage range, VCC –0.5 V to 6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC input clamp current, IIK (VI < –0.5 V) –20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC output clamp current, IOK (VO < –0.5 V) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC output sink current per output pin, IOL 70 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC output source current per output pin, IOH –30 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous current through VCC, ICC 140 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous current through GND 400 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 1): E package 69 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M package 58 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SM package 70 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 2) MIN MAX UNIT VCC Supply voltage 4.75 5.25 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI Input voltage 0 VCC V VO Output voltage 0 VCC V IOH High-level output current –15 mA IOL Low-level output current 48 mA ∆t/∆v Input transition rise or fall rate 0 10 ns/V TA Operating free-air temperature 0 70 °C NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. |
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