DP8344 datasheet(24/184 Pages) NSC

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20 CPU Description (Continued)

mind that the Jcc instruction is just an optional syntax for

the conditional JMP instruction

The example in

Figure 2-5 demonstrates two possible ways

to code the conditional relative jump instruction when test-

ing for a false Z flag in CCR

In the example assume

that the symbol ‘‘Z’’ equals ‘‘000’’ binary that the symbol

‘‘NS’’ equals ‘‘0’’ binary and that the symbol ‘‘SKIPIT’’

points to the desired instruction with which to begin execu-

tion if Z is false

On the other hand the conditional absolute jump instruc-

tion LJMP can test any bit in any currently active CPU reg-

ister Table 2-14 shows the conditional long jump instruction

syntax

JMP

ZNSSKIPIT

40 goto SKIPIT

-or-

JNZ

SKIPIT

40 goto SKIPIT

FIGURE 2-5 Coding Examples of Equivalent

Conditional Jump Instructions

TABLE 2-11 Conditional Relative Jump Instruction

Syntax

Instruction Operation

Operand Range

Addressing Mode

JMP fsn

If the flag ‘‘f’’ is in the state ‘‘s’’

128 a127

Immediate

then PC a n (sign extended)

xPC

Jcc n

If the condition ‘‘cc’’ is met

128 a127

Immediate

then PC a n (sign extended)

xPC

Note

PC e Program Counter contents initially points to instruction following jump

TABLE 2-12 ‘‘f’’ Flags

‘‘f’’(Binary) Flag

Flag Name

Containing Flag

000

Zero

CCR

001

Carry

CCR

010

Overflow

CCR

011

Negative

CCR

100

Receiver Active

TSR

101

Receiver Error

TSR

110

DAV Data Available

TSR

111

TFF Transmitter FIFO Full

TSR

TABLE 2-13 ‘‘cc’’ Conditions Tested

‘‘cc’’ Field

Condition Tested for

Flag ‘‘f’’’s Condition

Zero

Not Zero

Equal

NEQ

Not Equal

Carry

No Carry

Overflow

No Overflow

Negative

Positive

Receiver Active

NRA

Not Receiver Active

Receiver Error

NRE

No Receiver Error

Data Available

DAV

NDA

No Data Available

DAV

TFF

Transmitter FIFO FULL

TFF

NTFF

Transmitter FIFO Not Full

TFF

TABLE 2-14 Conditional Absolute Jump Instruction

Syntax

Instruction Operation

Operand Range

Addressing Mode

LJMP

Rspsnn

If the bit of register ‘‘Rs’’ in

0 64k

position ‘‘p’’ is in the state ‘‘s’’

then nn

xPC

Note

PC e Program Counter

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