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ADC12L080 bảng dữ liệu(PDF) 8 Page - Texas Instruments |
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ADC12L080 bảng dữ liệu(HTML) 8 Page - Texas Instruments |
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8 / 31 page ![]() ADC12L080 SNAS200B – OCTOBER 2004 – REVISED MARCH 2013 www.ti.com DC and Logic Electrical Characteristics (continued) Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR = +2.5V, PD = 0V, VREF = +1.0V external, VCM = 1.65V, RS < 100Ω, fCLK = 80 MHz, tr = tf = 2 ns, fIN = 70 MHz, CL = 15 pF/pin. Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C (1)(2)(3)(4) Units Symbol Parameter Conditions Typical(4) Limits(4) (Limits) CLK, PD, OF DIGITAL INPUT CHARACTERISTICS VIN(1) Logical “1” Input Voltage VD = 3.3V 2.0 V (min) VIN(0) Logical “0” Input Voltage VD = 3.3V 0.8 V (max) IIN(1) Logical “1” Input Current VIN+, VIN− = 3.3V 10 µA IIN(0) Logical “0” Input Current VIN+, VIN− = 0V −10 µA CIN Digital Input Capacitance 5 pF D0–D11 DIGITAL OUTPUT CHARACTERISTICS VOUT(1) Logical “1” Output Voltage IOUT = −0.5 mA VDR − 0.18 V (min) VOUT(0) Logical “0” Output Voltage IOUT = 1.6 mA 0.4 V (max) +ISC Output Short Circuit Source Current VOUT = 0V −20 mA −ISC Output Short Circuit Sink Current VOUT = 2.5V 20 mA POWER SUPPLY CHARACTERISTICS PD Pin = DGND 120 168 mA (max) IA Analog Supply Current PD Pin = VDR 10 mA PD Pin = DGND 6 11.5 mA (max) ID Digital Supply Current PD Pin = VDR 5 mA PD Pin = DGND, fin = 0 (5) (6) <1 mA IDR Digital Output Supply Current PD Pin = VDR 0 mA PD Pin = DGND, CL = 0 pF (7) 425 590 mW (max) Total Power Consumption PD Pin = VDR 50 mW Rejection of Full-Scale Gain Error PSRR1 Power Supply Rejection Ratio 41 dB change with VA = 3.0V vs. 3.6V (5) IDR is the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins, the supply voltage, VDR, and the rate at which the outputs are switching (which is signal dependent). IDR=VDR(C0 x f0 + C1 x f1 +....C11 x f11) where VDR is the output driver power supply voltage, Cn is total capacitance on the output pin, and fn is the average frequency at which that pin is toggling. (6) When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA, VD or VDR), the current at that pin should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two. (7) Power consumption excludes output driver power. See Note 5. 8 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: ADC12L080 |
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