ICS8705 datasheet(12/17 Pages) ICST

tên linh kiện	ICS8705

Giải thích chi tiết về linh kiện	ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR

PDF	17 Pages

Scroll/Zoom	100%

nhà sản xuất	ICST [Integrated Circuit Systems]

Trang chủ	http://www.icst.com

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12 / 17 page

8705BY

www.icst.com/products/hiperclocks.html

REV. G JUNE 16, 2004

Integrated

Circuit

Systems, Inc.

ICS8705

ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL

CLOCK GENERATOR

0.1uF

VDD

Zo = 50

VDD

10 - 15

VDD

RD1

Not Install

(U1-24)

(U1-32)

Logic Input Pin Examples

0.1uF

To Logic

Input

pins

(U1-9)

VDD

ICS8705

SEL0

SEL1

CLK0

CLK1

nCLK1

CLK_SEL

GND

VDDO

GND

VDDO

VDD=3.3V or 2.5V

To Logic

Input

pins

VDD

C16

10u

0.1uF

Zo = 50

(U1-12)

(U1-16)

(U1-28)

SEL1

RU2

Not Install

VDDA

0.1uF

Ro ~ 7 Ohm

Driv er_LVCMOS

(U1-20)

SEL0

0.1uF

Set Logic

Input to

'1'

RU1

Set Logic

Input to

'0'

0.1uF

RD2

C11

0.01u

LAYOUT GUIDELINE

The schematic of the ICS8705 layout example is shown in

Figure 4A. The ICS8705 recommended PCB board layout

for this example is shown in

Figure 4B. This layout example is

used as a general guideline. The layout in the actual system will

depend on the selected component types, the density of the

components, the density of the traces, and the stack up of the

P.C. board.

FIGURE 4A. ICS8705 LVCMOS CLOCK GENERATOR SCHEMATIC EXAMPLE

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