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TLP558 bảng dữ liệu(PDF) 5 Page - Toshiba Semiconductor

tên linh kiện TLP558
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TLP558 bảng dữ liệu(HTML) 5 Page - Toshiba Semiconductor

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TLP558
2002-09-25
5
(Note 6) Duration of output short circuit time should not exceed 10ms.
(Note 7) The tpLH propagation delay is measured from the 50% point on the trailing edge of the input pulse to the
1.3V point on the leading edge of the output pulse. The tpHL propagation delay is measured from the 50%
point on the leading edge of the input pulse to the 1.3V point on the trailing edge of the output pulse.
(Note 8) CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage
in the logic low state (VO > 0.8V).
CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage
in the logic state (VO > 2.0).
(Note 9) A ceramic capacitor (0.1µF) should be connected from pin 8 to pin 5 to stabilize the operation of the high
gain linear amplifier. Failure to provide the bypassing may impair the switching property. The total lead length
between capacitor and coupler should not exceed 1cm.
Test Circuit 1: tpLH, tpHL, tr And tf
VOL
1.3V
Input IF
0mA
VOH
tpHL
IF(ON)
Output VO
t r
t f
90%
10%
50%
tpLH
VCC
Pulse generation
tr = tf = 5ns
VO = 5V
D1～D4
D2
: 1S1588
CL
D3
VCC
GND
Monitor
CL is approximately 15pF which includes
probe and stray wiring capacitance.
D1
D4
5V
6
4
3
1
5
7
IF Monitor
IF
VO
8
2



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