V3021 datasheet(2/15 Pages) EMMICRO

2 / 15 page

V3021

www.emmicroelectronic.com

Absolute Maximum Ratings

Parameter

Symbol

Conditions

Maximum voltage at VDD

VDDmax

VSS + 7.0V

Minimun voltage at VDD

VDDmin

VSS – 0.3V

Maximum voltage at any

signal pin

Vmax

VDD + 0.3V

Minimum voltage at any signal

Vmin

VSS – 0.3V

Maximum storage

temperature

TSTOmax

+150°C

Minimum storage temperature

TSTOmin

-65°C

Electrostatic discharge

maximum to MIL-STD-883C

method 3015.7 with ref. to VSS

VSmax

1000V

Maximum soldering conditions

TSmax

250°C x 10s

Table 1

Stresses above these listed maximum ratings may cause

permanent damages to the device. Exposure beyond

specified operating conditions may affect device reliability

or cause malfunction.

Handling Procedures

This device has built-in protection against high static

voltages or electric fields; however, anti-static precautions

must be taken as for any other CMOS component. Unless

otherwise specified, proper operation can only occur when

all terminal voltages are kept within the voltage range.

Unused inputs must always be tied to a defined logic

voltage level.

Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

Operating temperature

-40

+125

°C

Logic supply voltage

VDD

2.0

5.0

5.5

Supply voltage dv/dt

(power-up & power-down)

V/µs

Decoupling capacitor

100

Crystal Characteristics

Frequency

32.768

kHz

Load capacitance

8.2

12.5

Series resistance

Ω

Table 2

See Fig. 3

Electrical Characteristics (standard temperature range)

VDD= 5.0V ±10%, VSS = 0V and TA=-40 to +85°C, unless otherwise specified

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Total static supply

ISS

All outputs open, all inputs at VDD

VDD = 3.0V, address 0 = 0

0.8

1.8

µA

Total static supply

ISS

All outputs open, all inputs at VDD

VDD = 5V, address 0 = 0

TA = +25°C

1.3

µA

Dynamic current

ISS

I/O to VSS through 1MΩ

RD = VSS, WR = VDD,

CS = 4 MHz

address 0 = 0, read all 0

300

µA

Input / Output

Input logic low

VIL

1.0

Input logic high

VIH

3.5

Output logic low

VOL

IOL = 4 mA

0.4

Output logic high

VOH

IOH = 4 mA

2.4

Input leakage

IIN

0.0 < VIN < 5.0V

0.1

µA

Output tri-state leakage on I/O

ITS

CS high, and address 0, bit 0, low

0.1

µA

Oscillator

Starting voltage

VSTA

1.8

Input capacitance on XI

CIN

TA = +25°C

Output capacitance on XO

COUT

TA = +25°C

Start-up time

TSTA

Frequency stability

∆f/f

1.5 ≤ VDD ≤ 5.5V, TA = +25°C

0.3

0.5

ppm/V

Frequency Measurement Mode

Current source on I/O pin

pulsed on/off @ 256 Hz

IONF

CS high, addr.0, bit 0, high

VI/O = 1V

µA

Table 3

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